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Date:   Thu, 28 May 2020 23:38:28 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Serge Semin <fancer.lancer@...il.com>,
        Vinod Koul <vkoul@...nel.org>,
        Viresh Kumar <vireshk@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Arnd Bergmann <arnd@...db.de>,
        Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
        devicetree <devicetree@...r.kernel.org>,
        dmaengine <dmaengine@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 09/10] dmaengine: dw: Introduce max burst length hw config

On Thu, May 28, 2020 at 6:43 PM Serge Semin
<Sergey.Semin@...kalelectronics.ru> wrote:
> On Thu, May 28, 2020 at 05:52:24PM +0300, Andy Shevchenko wrote:
> > On Wed, May 27, 2020 at 01:50:20AM +0300, Serge Semin wrote:

...

> > Perhaps,
> >
> >       /* DesignWare DMA supports burst value from 0 */
> >       caps->min_burst = 0;
>
> Regarding min_burst being zero. I don't fully understand what it means.
> It means no burst or burst with minimum length or what?
> In fact DW DMA burst length starts from 1. Remember the burst-length run-time
> parameter we were arguing about? Anyway the driver makes sure that both
> 0 and 1 requested burst length are setup as burst length of 1 in the
> CTLx.SRC_MSIZE, CTLx.DST_MSIZE fields.

Yeah, I also thought about it after I sent a message. 1 sounds better.

-- 
With Best Regards,
Andy Shevchenko

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