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Message-ID: <20200528233159.GA876777@bogus>
Date:   Thu, 28 May 2020 17:31:59 -0600
From:   Rob Herring <robh@...nel.org>
To:     Rahul Tanwar <rahul.tanwar@...ux.intel.com>
Cc:     thierry.reding@...il.com, u.kleine-koenig@...gutronix.de,
        p.zabel@...gutronix.de, linux-pwm@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        andriy.shevchenko@...el.com, songjun.Wu@...el.com,
        cheol.yong.kim@...el.com, qi-ming.wu@...el.com
Subject: Re: [PATCH v1 1/2] Add YAML schema for a new PWM driver

On Fri, May 22, 2020 at 03:41:58PM +0800, Rahul Tanwar wrote:
> Add DT bindings YAML schema for PWM controller driver of
> Lightning Mountain(LGM) SoC.

You need a better subject such as what h/w this is for. Bindings are for 
h/w blocks, not drivers.

> 
> Signed-off-by: Rahul Tanwar <rahul.tanwar@...ux.intel.com>
> ---
>  .../devicetree/bindings/pwm/pwm-intel-lgm.yaml     | 43 ++++++++++++++++++++++

Use the compatible string for filename.

>  1 file changed, 43 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-intel-lgm.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-intel-lgm.yaml b/Documentation/devicetree/bindings/pwm/pwm-intel-lgm.yaml
> new file mode 100644
> index 000000000000..adb33265aa5e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-intel-lgm.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/pwm-intel-lgm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: LGM SoC PWM controller
> +
> +maintainers:
> +  - Rahul Tanwar <rahul.tanwar@...el.com>
> +
> +properties:
> +  compatible:
> +    const: intel,lgm-pwm
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#pwm-cells":
> +    const: 2
> +
> +  clocks:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#pwm-cells"
> +  - clocks
> +  - resets

additionalProperties: false

> +
> +examples:
> +  - |
> +    pwm: pwm@...00000 {
> +        compatible = "intel,lgm-pwm";
> +        reg = <0xe0d00000 0x30>;
> +        #pwm-cells = <2>;
> +        clocks = <&cgu0 126>;
> +        resets = <&rcu0 0x30 21>;
> +    };
> -- 
> 2.11.0
> 

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