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Message-ID: <7299c445-4d26-06ce-9073-8ac0f32e590e@gmail.com>
Date: Fri, 29 May 2020 11:04:36 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Lukas Wunner <lukas@...ner.de>
Cc: linux-kernel@...r.kernel.org, Mark Brown <broonie@...nel.org>,
Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
"maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE..."
<bcm-kernel-feedback-list@...adcom.com>,
Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
"open list:SPI SUBSYSTEM" <linux-spi@...r.kernel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] spi: bcm2835: Implement shutdown callback
On 5/29/20 10:58 AM, Lukas Wunner wrote:
> On Fri, May 29, 2020 at 10:48:11AM -0700, Florian Fainelli wrote:
>> On 5/29/20 10:47 AM, Lukas Wunner wrote:
>>> On Thu, May 28, 2020 at 12:06:05PM -0700, Florian Fainelli wrote:
>>>> Make sure we clear the FIFOs, stop the block, disable the clock and
>>>> release the DMA channel.
>>>
>>> To what end? Why is this change necessary? Sorry but this seems like
>>> an awfully terse commit message.
>>
>> To ensure clocks are disabled and to save power in low power modes used
>> on 7211 for instance.
>
> Thanks for the explanation, that's an important tidbit. I wasn't even
> aware that this SPI controller is used on SoCs beyond the Raspberry Pi
> ones. Does the BCM7211 use shared interrupts for this controller?
> Does it have DMA DREQ attached?
For all practical purposes you can consider that 7211 is identical to a
2711, it does use shared interrupts for this controller and there is a
DRAM DREQ attached as well. Where they differ are on the display, video,
and memory controller MAC.
--
Florian
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