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Message-ID: <159072624444.69627.15869373473877279955@swboyd.mtv.corp.google.com>
Date: Thu, 28 May 2020 21:24:04 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Catalin Marinas <catalin.marinas@....com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
Evan Green <evgreen@...omium.org>,
Fabien Parent <fparent@...libre.com>,
Joerg Roedel <jroedel@...e.de>,
Macpaul Lin <macpaul.lin@...iatek.com>,
Marc Zyngier <marc.zyngier@....com>,
Mark Rutland <mark.rutland@....com>,
Mars Cheng <mars.cheng@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Owen Chen <owen.chen@...iatek.com>,
Rob Herring <robh+dt@...nel.org>,
Ryder Lee <Ryder.Lee@...iatek.com>,
Sean Wang <Sean.Wang@...iatek.com>,
Shawn Guo <shawnguo@...nel.org>,
Weiyi Lu <weiyi.lu@...iatek.com>,
Will Deacon <will@...nel.org>, Yong Wu <yong.wu@...iatek.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org,
mtk01761 <wendell.lin@...iatek.com>
Cc: Mediatek WSD Upstream <wsd_upstream@...iatek.com>,
CC Hwang <cc.hwang@...iatek.com>,
Loda Chou <loda.chou@...iatek.com>
Subject: Re: [PATCH 4/5] clk: mediatek: add mt6765 clock IDs
Quoting Macpaul Lin (2020-02-21 01:52:21)
> From: Mars Cheng <mars.cheng@...iatek.com>
>
> Add MT6765 clock dt-bindings, include topckgen, apmixedsys,
> infracfg, mcucfg and subsystem clocks.
>
> Signed-off-by: Mars Cheng <mars.cheng@...iatek.com>
> Signed-off-by: Owen Chen <owen.chen@...iatek.com>
> Signed-off-by: Macpaul Lin <macpaul.lin@...iatek.com>
> Reviewed-by: Rob Herring <robh@...nel.org>
> ---
Applied to clk-next
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