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Message-Id: <159074223979.887186.1909053030258448427.b4-ty@kernel.org>
Date: Fri, 29 May 2020 09:52:13 +0100
From: Marc Zyngier <maz@...nel.org>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: linux-kernel@...r.kernel.org, Jason Cooper <jason@...edaemon.net>,
Huacai Chen <chenhc@...ote.com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-mips@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH v5 0/6] Three Loongson irqchip support
On Thu, 28 May 2020 23:27:48 +0800, Jiaxun Yang wrote:
> v5:
> - Add some range checks in dt-schema
>
> Jiaxun Yang (6):
> irqchip: Add Loongson HyperTransport Vector support
> dt-bindings: interrupt-controller: Add Loongson HTVEC
> irqchip: Add Loongson PCH PIC controller
> dt-bindings: interrupt-controller: Add Loongson PCH PIC
> irqchip: Add Loongson PCH MSI controller
> dt-bindings: interrupt-controller: Add Loongson PCH MSI
>
> [...]
Applied to irq/irqchip-next, thanks!
[1/6] irqchip: Add Loongson HyperTransport Vector support
commit: 818e915fbac518e8c78e1877a0048d92d4965e5a
[2/6] dt-bindings: interrupt-controller: Add Loongson HTVEC
commit: 6c2832c3c6edc38ab58bad29731b4951c0a90cf8
[3/6] irqchip: Add Loongson PCH PIC controller
commit: ef8c01eb64ca6719da449dab0aa9424e13c58bd0
[4/6] dt-bindings: interrupt-controller: Add Loongson PCH PIC
commit: b6e4bc125fc517969f97d901b1845ebf47bbea26
[5/6] irqchip: Add Loongson PCH MSI controller
commit: 632dcc2c75ef6de3272aa4ddd8f19da1f1ace323
[6/6] dt-bindings: interrupt-controller: Add Loongson PCH MSI
commit: da10a4b626657387845f32d37141fc7d48ebbdb3
I've cherry-picked Rob's Rbs that were posted on the v4 series.
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
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