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Message-ID: <20200529102724.GB12270@e121166-lin.cambridge.arm.com>
Date: Fri, 29 May 2020 11:27:24 +0100
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Dinghao Liu <dinghao.liu@....edu.cn>
Cc: kjlu@....edu, Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Vidya Sagar <vidyas@...dia.com>,
Andrew Murray <amurray@...goodpenguin.co.uk>,
linux-pci@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] [v2] PCI: tegra194: Fix runtime PM imbalance on error
On Thu, May 21, 2020 at 11:13:49AM +0800, Dinghao Liu wrote:
> pm_runtime_get_sync() increments the runtime PM usage counter even
> when it returns an error code. Thus a pairing decrement is needed on
> the error handling path to keep the counter balanced.
>
> Signed-off-by: Dinghao Liu <dinghao.liu@....edu.cn>
> ---
> drivers/pci/controller/dwc/pcie-tegra194.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
Applied to pci/tegra, thanks.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index ae30a2fd3716..2c0d2ce16b47 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1623,7 +1623,7 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
> ret = pinctrl_pm_select_default_state(dev);
> if (ret < 0) {
> dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
> - goto fail_pinctrl;
> + goto fail_pm_get_sync;
> }
>
> tegra_pcie_init_controller(pcie);
> @@ -1650,9 +1650,8 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
>
> fail_host_init:
> tegra_pcie_deinit_controller(pcie);
> -fail_pinctrl:
> - pm_runtime_put_sync(dev);
> fail_pm_get_sync:
> + pm_runtime_put_sync(dev);
> pm_runtime_disable(dev);
> return ret;
> }
> --
> 2.17.1
>
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