linux-kernel - Re: [PATCH v4 11/11] dmaengine: dw: Initialize max_sg

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Message-ID: <20200529102758.GF1634618@smile.fi.intel.com>
Date:   Fri, 29 May 2020 13:27:58 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Vinod Koul <vkoul@...nel.org>, Viresh Kumar <vireshk@...nel.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Serge Semin <fancer.lancer@...il.com>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Arnd Bergmann <arnd@...db.de>,
        Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
        devicetree@...r.kernel.org, dmaengine@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 11/11] dmaengine: dw: Initialize max_sg_nents
 capability

On Fri, May 29, 2020 at 01:24:01AM +0300, Serge Semin wrote:
> Multi-block support provides a way to map the kernel-specific SG-table so
> the DW DMA device would handle it as a whole instead of handling the
> SG-list items or so called LLP block items one by one. So if true LLP
> list isn't supported by the DW DMA engine, then soft-LLP mode will be
> utilized to load and execute each LLP-block one by one. The soft-LLP mode
> of the DMA transactions execution might not work well for some DMA
> consumers like SPI due to its Tx and Rx buffers inter-dependency. Let's
> initialize the max_sg_nents DMA channels capability based on the nollp
> flag state. If it's true, no hardware accelerated LLP is available and
> max_sg_nents should be set with 1, which means that the DMA engine
> can handle only a single SG list entry at a time. If noLLP is set to
> false, then hardware accelerated LLP is supported and the DMA engine
> can handle infinite number of SG entries in a single DMA transaction.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

> 
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
> Cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: linux-mips@...r.kernel.org
> Cc: devicetree@...r.kernel.org
> 
> ---
> 
> Changelog v3:
> - This is a new patch created as a result of the discussion with Vinud and
>   Andy in the framework of DW DMA burst and LLP capabilities.
> 
> Changelog v4:
> - Use explicit if-else statement when assigning the max_sg_nents field.
> ---
>  drivers/dma/dw/core.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
> index 60ef779fc5e0..b76eee75fde8 100644
> --- a/drivers/dma/dw/core.c
> +++ b/drivers/dma/dw/core.c
> @@ -1059,6 +1059,18 @@ static void dwc_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
>  	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
>  
>  	caps->max_burst = dwc->max_burst;
> +
> +	/*
> +	 * It might be crucial for some devices to have the hardware
> +	 * accelerated multi-block transfers supported, aka LLPs in DW DMAC
> +	 * notation. So if LLPs are supported then max_sg_nents is set to
> +	 * zero which means unlimited number of SG entries can be handled in a
> +	 * single DMA transaction, otherwise it's just one SG entry.
> +	 */
> +	if (dwc->nollp)
> +		caps->max_sg_nents = 1;
> +	else
> +		caps->max_sg_nents = 0;
>  }
>  
>  int do_dma_probe(struct dw_dma_chip *chip)
> -- 
> 2.26.2
> 

-- 
With Best Regards,
Andy Shevchenko