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Message-ID: <87lflaq1lb.fsf@soft-dev15.microsemi.net>
Date: Fri, 29 May 2020 16:04:32 +0200
From: Lars Povlsen <lars.povlsen@...rochip.com>
To: Stephen Boyd <sboyd@...nel.org>
CC: Arnd Bergmann <arnd@...db.de>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>, SoC Team <soc@...nel.org>,
Lars Povlsen <lars.povlsen@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
Olof Johansson <olof@...om.net>,
Michael Turquette <mturquette@...libre.com>,
<devicetree@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-gpio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Alexandre Belloni <alexandre.belloni@...tlin.com>
Subject: Re: [PATCH 10/14] dt-bindings: clock: sparx5: Add Sparx5 SoC DPLL clock
Stephen Boyd writes:
> Quoting Lars Povlsen (2020-05-13 05:55:28)
>> diff --git a/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
>> new file mode 100644
>> index 0000000000000..594007d8fc59a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/microchip,sparx5-dpll.yaml
>> @@ -0,0 +1,46 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/microchip,sparx5-dpll.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Microchip Sparx5 DPLL Clock
>> +
>> +maintainers:
>> + - Lars Povlsen <lars.povlsen@...rochip.com>
>> +
>> +description: |
>> + The Sparx5 DPLL clock controller generates and supplies clock to
>> + various peripherals within the SoC.
>> +
>> + This binding uses common clock bindings
>> + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
>
> I don't think we need this sentence. Please drop it.
OK. (Assuming the "This binding ..." part).
>
>> +
>> +properties:
>> + compatible:
>> + const: microchip,sparx5-dpll
>> +
>> + reg:
>> + items:
>> + - description: dpll registers
>> +
>> + '#clock-cells':
>> + const: 1
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - '#clock-cells'
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> + # Clock provider for eMMC:
>> + - |
>> + clks: clks@...10000c {
>
> Node name should be clock-controller@...10000c
Ok.
>
>> + compatible = "microchip,sparx5-dpll";
>> + #clock-cells = <1>;
>> + reg = <0x1110000c 0x24>;
>
> Does it consume any clks itself? I'd expect to see some sort of 'clocks'
> property in this node.
>
>> + };
I changed the driver to use a fixed-rate input clock, replacing the
BASE_CLOCK define(s). Additionally, I made the ahb_clock into
fixed-factor clock using the A53 cpu clock as a base.
So I updated the example and added 'clocks' to the schema.
I will send you a new series shortly.
Thank you for the comments.
--
Lars Povlsen,
Microchip
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