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Message-ID: <159086246567.69627.6187271777288137186@swboyd.mtv.corp.google.com>
Date: Sat, 30 May 2020 11:14:25 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Michael Turquette <mturquette@...libre.com>,
Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Serge Semin <fancer.lancer@...il.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Arnd Bergmann <arnd@...db.de>,
Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: Re: [PATCH v3 4/4] clk: Add Baikal-T1 CCU Dividers driver
Quoting Serge Semin (2020-05-26 15:20:56)
> Nearly each Baikal-T1 IP-core is supposed to have a clock source
> of particular frequency. But since there are greater than five
> IP-blocks embedded into the SoC, the CCU PLLs can't fulfill all the
> needs. Baikal-T1 CCU provides a set of fixed and configurable clock
> dividers in order to generate a necessary signal for each chip
> sub-block.
>
> This driver creates the of-based hardware clocks for each divider
> available in Baikal-T1 CCU. The same way as for PLLs we split the
> functionality up into the clocks operations (gate, ungate, set rate,
> etc) and hardware clocks declaration/registration procedures.
>
> In accordance with the CCU documentation all its dividers are distributed
> into two CCU sub-blocks: AXI-bus and system devices reference clocks.
> The former sub-block is used to supply the clocks for AXI-bus interfaces
> (AXI clock domains) and the later one provides the SoC IP-cores reference
> clocks. Each sub-block is represented by a dedicated DT node, so they
> have different compatible strings to distinguish one from another.
>
> For some reason CCU provides the dividers of different types. Some
> dividers can be gateable some can't, some are fixed while the others
> are variable, some have special divider' limitations, some've got a
> non-standard register layout and so on. In order to cover all of these
> cases the hardware clocks driver is designed with an info-descriptor
> pattern. So there are special static descriptors declared for the
> dividers of each type with additional flags describing the block
> peculiarity. These descriptors are then used to create hardware clocks
> with proper operations.
>
> Some CCU dividers provide a way to reset a domain they generate
> a clock for. So the CCU AXI-bus and CCU system devices clock
> drivers also perform the reset controller registration.
>
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>
> Cc: Arnd Bergmann <arnd@...db.de>
> Cc: Rob Herring <robh+dt@...nel.org>
> Cc: linux-mips@...r.kernel.org
> Cc: devicetree@...r.kernel.org
>
> ---
Applied to clk-next
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