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Message-ID: <69544f6f-a045-fd1b-aca8-c69380e97cd9@i2se.com>
Date:   Sun, 31 May 2020 01:30:16 +0200
From:   Stefan Wahren <stefan.wahren@...e.com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        linux-kernel@...r.kernel.org
Cc:     "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Scott Branden <sbranden@...adcom.com>,
        Ray Jui <rjui@...adcom.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Matti Vaittinen <matti.vaittinen@...rohmeurope.com>,
        "open list:PIN CONTROL SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE..." 
        <bcm-kernel-feedback-list@...adcom.com>,
        "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
        <linux-rpi-kernel@...ts.infradead.org>,
        Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
Subject: Re: [PATCH v2 4/4] pinctrl: bcm2835: Add support for wake-up
 interrupts

Hi Florian,

Am 30.05.20 um 23:19 schrieb Florian Fainelli:
>
> On 5/30/2020 12:49 AM, Stefan Wahren wrote:
>> Hi Florian,
>>
>> Am 29.05.20 um 21:15 schrieb Florian Fainelli:
>>>  }
>>>  
>>> +static int bcm2835_gpio_irq_set_wake(struct irq_data *data, unsigned int on)
>>> +{
>>> +	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
>>> +	struct bcm2835_pinctrl *pc = gpiochip_get_data(chip);
>>> +	unsigned gpio = irqd_to_hwirq(data);
>>> +	unsigned int irqgroup;
>>> +	int ret = -EINVAL;
>>> +
>>> +	if (!pc->wake_irq)
>>> +		return ret;
>>> +
>>> +	if (gpio <= 27)
>>> +		irqgroup = 0;
>>> +	else if (gpio >= 28 && gpio <= 45)
>>> +		irqgroup = 1;
>>> +	else if (gpio >= 46 && gpio <= 53)
>>> +		irqgroup = 2;
>> in case the BCM7211 has 58 GPIOs, but the wake up interrupts are only
>> available for the first 54 this should deserve a comment.
> irqgroup 2 covers GPIOs 46 through 57, thanks for noticing. Do you have
> more comments before I spin a v3? Thank you for reviewing.

no, i don't.

Regards
Stefan

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