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Message-ID: <20200531114908.004ad79a@archlinux>
Date:   Sun, 31 May 2020 11:49:08 +0100
From:   Jonathan Cameron <jic23@...nel.org>
To:     Jishnu Prakash <jprakash@...eaurora.org>
Cc:     agross@...nel.org, bjorn.andersson@...aro.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        mka@...omium.org, linus.walleij@...aro.org,
        Jonathan.Cameron@...wei.com, andy.shevchenko@...il.com,
        amit.kucheria@...durent.com, smohanad@...eaurora.org,
        kgunda@...eaurora.org, aghayal@...eaurora.org,
        Hartmut Knaack <knaack.h@....de>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Peter Meerwald-Stadler <pmeerw@...erw.net>,
        linux-arm-msm@...r.kernel.org, linux-iio@...r.kernel.org,
        linux-arm-msm-owner@...r.kernel.org
Subject: Re: [PATCH V6 5/7] iio: adc: Update return value checks

On Thu, 28 May 2020 22:24:27 +0530
Jishnu Prakash <jprakash@...eaurora.org> wrote:

> Clean up some return value checks to make code more compact.
> 
> Signed-off-by: Jishnu Prakash <jprakash@...eaurora.org>

Applied.

Thanks,

J
> ---
>  drivers/iio/adc/qcom-spmi-adc5.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
> index dcc7599..3022313 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -301,7 +301,7 @@ static int adc5_configure(struct adc5_chip *adc,
>  
>  	/* Read registers 0x42 through 0x46 */
>  	ret = adc5_read(adc, ADC5_USR_DIG_PARAM, buf, sizeof(buf));
> -	if (ret < 0)
> +	if (ret)
>  		return ret;
>  
>  	/* Digital param selection */
> @@ -388,7 +388,7 @@ static int adc5_do_conversion(struct adc5_chip *adc,
>  
>  	if (adc->poll_eoc) {
>  		ret = adc5_poll_wait_eoc(adc);
> -		if (ret < 0) {
> +		if (ret) {
>  			pr_err("EOC bit not set\n");
>  			goto unlock;
>  		}
> @@ -398,7 +398,7 @@ static int adc5_do_conversion(struct adc5_chip *adc,
>  		if (!ret) {
>  			pr_debug("Did not get completion timeout.\n");
>  			ret = adc5_poll_wait_eoc(adc);
> -			if (ret < 0) {
> +			if (ret) {
>  				pr_err("EOC bit not set\n");
>  				goto unlock;
>  			}
> @@ -516,8 +516,6 @@ static int adc5_read_raw(struct iio_dev *indio_dev,
>  	default:
>  		return -EINVAL;
>  	}
> -
> -	return 0;
>  }
>  
>  static int adc7_read_raw(struct iio_dev *indio_dev,
> @@ -761,7 +759,7 @@ static int adc5_get_dt_channel_data(struct adc5_chip *adc,
>  
>  		ret = adc5_read(adc, ADC5_USR_REVISION1, dig_version,
>  							sizeof(dig_version));
> -		if (ret < 0) {
> +		if (ret) {
>  			dev_err(dev, "Invalid dig version read %d\n", ret);
>  			return ret;
>  		}

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