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Message-ID: <alpine.LNX.2.20.13.2006011132530.16067@monopod.intra.ispras.ru>
Date: Mon, 1 Jun 2020 12:01:48 +0300 (MSK)
From: Alexander Monakov <amonakov@...ras.ru>
To: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
cc: linux-kernel@...r.kernel.org, Joerg Roedel <joro@...tes.org>,
iommu@...ts.linux-foundation.org
Subject: Re: [PATCH] iommu/amd: Fix event counter availability check
On Mon, 1 Jun 2020, Suravee Suthikulpanit wrote:
> > Moving init_iommu_perf_ctr just after iommu_flush_all_caches resolves
> > the issue. This is the earliest point in amd_iommu_init_pci where the
> > call succeeds on my laptop.
>
> According to your description, it should just need to be anywhere after the
> pci_enable_device() is called for the IOMMU device, isn't it? So, on your
> system, what if we just move the init_iommu_perf_ctr() here:
No, this doesn't work, as I already said in the paragraph you are responding
to. See my last sentence in the quoted part.
So the implication is init_device_table_dma together with subsequent cache
flush is also setting up something that is necessary for counters to be
writable.
Alexander
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