linux-kernel - Re: [PATCH RESEND v2 0/6] mips: Add DT bindings for MIPS CDMM and MIPS GIC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 1 Jun 2020 18:56:46 +0200
From:   Thomas Bogendoerfer <tsbogend@...ha.franken.de>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Marc Zyngier <maz@...nel.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Paul Burton <paul.burton@...tec.com>,
        Rob Herring <robh+dt@...nel.org>,
        Arnd Bergmann <arnd@...db.de>,
        Jason Cooper <jason@...edaemon.net>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        James Hogan <jhogan@...nel.org>, linux-mips@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v2 0/6] mips: Add DT bindings for MIPS CDMM and
 MIPS GIC

On Mon, Jun 01, 2020 at 06:24:49PM +0300, Serge Semin wrote:
> Hello Marc,
> 
> On Mon, Jun 01, 2020 at 01:31:27PM +0100, Marc Zyngier wrote:
> > On 2020-06-01 13:21, Serge Semin wrote:
> > 
> > [...]
> > 
> > > Since Paul isn't looking after the MIPS arch code anymore, Ralf hasn't
> > > been seen maintaining MIPS for a long time, Thomas is only responsible
> > > for the next part of it:
> > > 	F:      Documentation/devicetree/bindings/mips/
> > > 	F:      Documentation/mips/
> > > 	F:      arch/mips/
> > > 	F:      drivers/platform/mips/
> > > the MIPS-specific drivers like:
> > > 	F:	drivers/bus/mips_cdmm.c
> > > 	F:	drivers/irqchip/irq-mips-cpu.c
> > > 	F:	drivers/irqchip/irq-mips-gic.c
> > > 	F:	drivers/clocksource/mips-gic-timer.c
> > > 	F:	drivers/cpuidle/cpuidle-cps.c
> > > seem to be left for the subsystems maintainers to support. So if you
> > > don't
> > > mind or unless there is a better alternative, I can help with looking
> > > after them to ease the maintainers review burden and since I'll be
> > > working
> > > on our MIPS-based SoC drivers integrating into the mainline kernel repo
> > > anyway. If you don't like this idea, please just decline the last
> > > patch in the series.
> > 
> 
> > Given how deeply integrated the MIPS GIC is in the architecture, I'd
> > really like Thomas to co-maintain it, or at the very least give his
> > blessing on you being the dedicated point of contact for MIPS GIC
> > stuff.
> 
> I don't mind either way. First option might be even better. Thomas,
> what do you think?

sure, I'm happy to be your co-maintainer.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]