lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200603000318.2xgizrgwauw2ywwu@mobilestation>
Date:   Wed, 3 Jun 2020 03:03:18 +0300
From:   Serge Semin <Sergey.Semin@...kalelectronics.ru>
To:     Marc Zyngier <maz@...nel.org>
CC:     Serge Semin <fancer.lancer@...il.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Paul Burton <paul.burton@...tec.com>,
        Rob Herring <robh+dt@...nel.org>,
        Arnd Bergmann <arnd@...db.de>,
        Jason Cooper <jason@...edaemon.net>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        James Hogan <jhogan@...nel.org>, <linux-mips@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 6/6] MAINTAINERS: Add maintainers for MIPS core drivers

On Tue, Jun 02, 2020 at 11:12:31AM +0100, Marc Zyngier wrote:
> On 2020-06-02 11:09, Serge Semin wrote:
> > Add Thomas and myself as maintainers of the MIPS CPU and GIC IRQchip,
> > MIPS
> > GIC timer and MIPS CPS CPUidle drivers.
> > 
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> > 
> > ---
> > 
> > Changelog v3:
> > - Keep the files list alphabetically ordered.
> > - Add Thomas as the co-maintainer of the designated drivers.
> > ---
> >  MAINTAINERS | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 2926327e4976..20532e0287d7 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -11278,6 +11278,17 @@
> > F:	arch/mips/configs/generic/board-boston.config
> >  F:	drivers/clk/imgtec/clk-boston.c
> >  F:	include/dt-bindings/clock/boston-clock.h
> > 
> > +MIPS CORE DRIVERS
> > +M:	Thomas Bogendoerfer <tsbogend@...ha.franken.de>
> > +M:	Serge Semin <fancer.lancer@...il.com>
> > +L:	linux-mips@...r.kernel.org
> > +S:	Supported
> > +F:	drivers/bus/mips_cdmm.c
> > +F:	drivers/clocksource/mips-gic-timer.c
> > +F:	drivers/cpuidle/cpuidle-cps.c
> > +F:	drivers/irqchip/irq-mips-cpu.c
> > +F:	drivers/irqchip/irq-mips-gic.c
> > +
> >  MIPS GENERIC PLATFORM
> >  M:	Paul Burton <paulburton@...nel.org>
> >  L:	linux-mips@...r.kernel.org
> 
> Acked-by: Marc Zyngier <maz@...nel.org>
> 
> I assume this will go via the MIPS tree.

Yes, I also think so. Though I suppose first we have to get acks from
Rafael J. Wysocki (CPU IDLE) or Daniel Lezcano (CPU IDLE,
CLOCKSOURCE/CLOCKEVENT) or Thomas Gleixner (CLOCKSOURCE, CLOCKEVENT)
since we are going to maintain the drivers from the subsystems they
support. Am I right?

-Sergey

> 
> Thanks,
> 
>         M.
> -- 
> Jazz is not dead. It just smells funny...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ