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Message-ID: <20200603125439.23275-3-benjamin.gaignard@st.com>
Date: Wed, 3 Jun 2020 14:54:35 +0200
From: Benjamin Gaignard <benjamin.gaignard@...com>
To: <fabrice.gasnier@...com>, <lee.jones@...aro.org>,
<robh+dt@...nel.org>, <mcoquelin.stm32@...il.com>,
<alexandre.torgue@...com>, <linux@...linux.org.uk>,
<daniel.lezcano@...aro.org>, <tglx@...utronix.de>
CC: <devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Benjamin Gaignard <benjamin.gaignard@...com>
Subject: [RESEND v7 2/6] ARM: dts: stm32: Add timer subnodes on stm32mp15 SoCs
Add timer subnode and interrupts to low power timer nodes for
all stm32mp15x SoCs.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...com>
---
arch/arm/boot/dts/stm32mp151.dtsi | 35 +++++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 3ea05ba48215..5e881e8d0f58 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -359,6 +359,8 @@
reg = <0x40009000 0x400>;
clocks = <&rcc LPTIM1_K>;
clock-names = "mux";
+ interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -377,6 +379,11 @@
compatible = "st,stm32-lptimer-counter";
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
spi2: spi@...0b000 {
@@ -1144,6 +1151,8 @@
reg = <0x50021000 0x400>;
clocks = <&rcc LPTIM2_K>;
clock-names = "mux";
+ interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1162,6 +1171,11 @@
compatible = "st,stm32-lptimer-counter";
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
lptimer3: timer@...22000 {
@@ -1171,6 +1185,8 @@
reg = <0x50022000 0x400>;
clocks = <&rcc LPTIM3_K>;
clock-names = "mux";
+ interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1184,6 +1200,11 @@
reg = <2>;
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
lptimer4: timer@...23000 {
@@ -1191,6 +1212,8 @@
reg = <0x50023000 0x400>;
clocks = <&rcc LPTIM4_K>;
clock-names = "mux";
+ interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1198,6 +1221,11 @@
#pwm-cells = <3>;
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
lptimer5: timer@...24000 {
@@ -1205,6 +1233,8 @@
reg = <0x50024000 0x400>;
clocks = <&rcc LPTIM5_K>;
clock-names = "mux";
+ interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1212,6 +1242,11 @@
#pwm-cells = <3>;
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
vrefbuf: vrefbuf@...25000 {
--
2.15.0
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