| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Thu, 4 Jun 2020 16:44:12 -0700
From: Krishna Reddy <vdumpa@...dia.com>
To: unlisted-recipients:; (no To-header on input)
CC: <joro@...tes.org>, <will@...nel.org>, <robin.murphy@....com>,
<linux-arm-kernel@...ts.infradead.org>,
<iommu@...ts.linux-foundation.org>, <linux-kernel@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <treding@...dia.com>,
<yhsu@...dia.com>, <snikam@...dia.com>, <praithatha@...dia.com>,
<talho@...dia.com>, <bbiswas@...dia.com>, <mperttunen@...dia.com>,
<nicolinc@...dia.com>, <bhuntsman@...dia.com>,
Krishna Reddy <vdumpa@...dia.com>
Subject: [PATCH v6 2/4] dt-bindings: arm-smmu: Add binding for Tegra194 SMMU
Add binding for NVIDIA's Tegra194 Soc SMMU that is based
on ARM MMU-500.
Signed-off-by: Krishna Reddy <vdumpa@...dia.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index e3ef1c69d1326..8f7ffd248f303 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -37,6 +37,11 @@ properties:
- qcom,sc7180-smmu-500
- qcom,sdm845-smmu-500
- const: arm,mmu-500
+ - description: NVIDIA SoCs that use more than one "arm,mmu-500"
+ items:
+ - enum:
+ - nvdia,tegra194-smmu-500
+ - const: arm,mmu-500
- items:
- const: arm,mmu-500
- const: arm,smmu-v2
--
2.26.2
Powered by blists - more mailing lists