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Message-ID: <9c35053c-22b5-c9bc-13fd-1e83e980d56d@gmail.com>
Date: Wed, 3 Jun 2020 19:56:23 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Jim Quinlan <james.quinlan@...adcom.com>,
linux-pci@...r.kernel.org, Christoph Hellwig <hch@....de>,
Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
bcm-kernel-feedback-list@...adcom.com
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Florian Fainelli <f.fainelli@...il.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 11/13] PCI: brcmstb: Accommodate MSI for older chips
On 6/3/2020 12:20 PM, Jim Quinlan wrote:
> From: Jim Quinlan <jquinlan@...adcom.com>
>
> Older BrcmSTB chips do not have a separate register for MSI interrupts; the
> MSIs are in a register that also contains unrelated interrupts. In
> addition, the interrupts lie in bits [31..24] for these legacy chips. This
> commit provides common code for both legacy and non-legacy MSI interrupt
> registers.
>
> Signed-off-by: Jim Quinlan <jquinlan@...adcom.com>
Acked-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
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