[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d419325c67594d77a918f49222013f0f1f454371.camel@suse.de>
Date: Fri, 05 Jun 2020 12:58:01 +0200
From: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
To: Florian Fainelli <f.fainelli@...il.com>,
linux-kernel@...r.kernel.org
Cc: "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Scott Branden <sbranden@...adcom.com>, lukas@...ner.de,
Ray Jui <rjui@...adcom.com>, Rob Herring <robh+dt@...nel.org>,
"open list:SPI SUBSYSTEM" <linux-spi@...r.kernel.org>,
Mark Brown <broonie@...nel.org>,
"maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE..."
<bcm-kernel-feedback-list@...adcom.com>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
Martin Sperl <kernel@...tin.sperl.org>
Subject: Re: [PATCH v2] spi: bcm2835: Enable shared interrupt support
On Fri, 2020-06-05 at 10:46 +0200, Nicolas Saenz Julienne wrote:
> Hi Florian,
> Thanks for taking over this!
>
> On Thu, 2020-06-04 at 14:28 -0700, Florian Fainelli wrote:
> > The 4 SPI controller instances added in BCM2711 and BCM7211 SoCs (SPI3,
> > SPI4, SPI5 and SPI6) share the same interrupt line with SPI0.
>
> I think this isn't 100% correct. SPI0 has its own interrupt, but SPI[3-6]
> share
> the same interrupt.
I'm wrong here, I missed this in bcm2711.dtsi:
&spi {
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
};
Sorry for the noise.
Regards,
Nicolas
Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)
Powered by blists - more mailing lists