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Message-ID: <977dd9ba222d8c513b09743da5cb53fd14bfd9a0.camel@suse.de>
Date: Fri, 05 Jun 2020 20:11:01 +0200
From: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
To: Maxime Ripard <maxime@...no.tech>
Cc: devicetree@...r.kernel.org, Tim Gover <tim.gover@...pberrypi.com>,
Dave Stevenson <dave.stevenson@...pberrypi.com>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linux-clk@...r.kernel.org, Eric Anholt <eric@...olt.net>,
Rob Herring <robh+dt@...nel.org>,
bcm-kernel-feedback-list@...adcom.com,
linux-rpi-kernel@...ts.infradead.org,
Phil Elwell <phil@...pberrypi.com>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver
On Fri, 2020-06-05 at 19:43 +0200, Maxime Ripard wrote:
> Hi Nicolas,
>
> On Thu, Jun 04, 2020 at 07:26:07PM +0200, Nicolas Saenz Julienne wrote:
> > On Wed, 2020-05-27 at 17:47 +0200, Maxime Ripard wrote:
> > > The HDMI block has a block that controls clocks and reset signals to the
> > > HDMI0 and HDMI1 controllers.
> >
> > Why not having two separate drivers?
>
> They share the same address space, so it wouldn't really make sense to
> split it into two drivers and an MFD, especially when the clock/reset
> association is fairly common.
Fair enough.
>
> > > Let's expose that through a clock driver implementing a clock and reset
> > > provider.
> > >
> > > Cc: Michael Turquette <mturquette@...libre.com>
> > > Cc: Stephen Boyd <sboyd@...nel.org>
> > > Cc: Rob Herring <robh+dt@...nel.org>
> > > Cc: linux-clk@...r.kernel.org
> > > Cc: devicetree@...r.kernel.org
> > > Reviewed-by: Stephen Boyd <sboyd@...nel.org>
> > > Signed-off-by: Maxime Ripard <maxime@...no.tech>
> > > ---
> > > drivers/clk/bcm/Kconfig | 11 +++-
> > > drivers/clk/bcm/Makefile | 1 +-
> > > drivers/clk/bcm/clk-bcm2711-dvp.c | 127 +++++++++++++++++++++++++++++++-
> > > 3 files changed, 139 insertions(+)
> > > create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
> > >
> > > diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> > > index 8c83977a7dc4..784f12c72365 100644
> > > --- a/drivers/clk/bcm/Kconfig
> > > +++ b/drivers/clk/bcm/Kconfig
> > > @@ -1,4 +1,15 @@
> > > # SPDX-License-Identifier: GPL-2.0-only
> > > +
> > > +config CLK_BCM2711_DVP
> > > + tristate "Broadcom BCM2711 DVP support"
> > > + depends on ARCH_BCM2835 ||COMPILE_TEST
> > > + depends on COMMON_CLK
> > > + default ARCH_BCM2835
> > > + select RESET_SIMPLE
> > > + help
> > > + Enable common clock framework support for the Broadcom BCM2711
> > > + DVP Controller.
> > > +
> > > config CLK_BCM2835
> > > bool "Broadcom BCM2835 clock support"
> > > depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
> > > diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> > > index 0070ddf6cdd2..2c1349062147 100644
> > > --- a/drivers/clk/bcm/Makefile
> > > +++ b/drivers/clk/bcm/Makefile
> > > @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
> > > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
> > > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
> > > obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o
> > > clk-iproc-asiu.o
> > > +obj-$(CONFIG_CLK_BCM2835) += clk-bcm2711-dvp.o
> > > obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835.o
> > > obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835-aux.o
> > > obj-$(CONFIG_CLK_RASPBERRYPI) += clk-raspberrypi.o
> > > diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-
> > > bcm2711-
> > > dvp.c
> > > new file mode 100644
> > > index 000000000000..c1c4b5857d32
> > > --- /dev/null
> > > +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > > @@ -0,0 +1,127 @@
> > > +// SPDX-License-Identifier: GPL-2.0-or-later
> > > +// Copyright 2020 Cerno
> > > +
> > > +#include <linux/clk-provider.h>
> > > +#include <linux/module.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/reset-controller.h>
> > > +#include <linux/reset/reset-simple.h>
> > > +
> > > +#define DVP_HT_RPI_SW_INIT 0x04
> > > +#define DVP_HT_RPI_MISC_CONFIG 0x08
> > > +
> > > +#define NR_CLOCKS 2
> > > +#define NR_RESETS 6
> > > +
> > > +struct clk_dvp {
> > > + struct clk_hw_onecell_data *data;
> > > + struct reset_simple_data reset;
> > > +};
> > > +
> > > +static const struct clk_parent_data clk_dvp_parent = {
> > > + .index = 0,
> > > +};
> > > +
> > > +static int clk_dvp_probe(struct platform_device *pdev)
> > > +{
> > > + struct clk_hw_onecell_data *data;
> > > + struct resource *res;
> > > + struct clk_dvp *dvp;
> > > + void __iomem *base;
> > > + int ret;
> > > +
> > > + dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
> > > + if (!dvp)
> > > + return -ENOMEM;
> > > + platform_set_drvdata(pdev, dvp);
> > > +
> > > + dvp->data = devm_kzalloc(&pdev->dev,
> > > + struct_size(dvp->data, hws, NR_CLOCKS),
> > > + GFP_KERNEL);
> > > + if (!dvp->data)
> > > + return -ENOMEM;
> > > + data = dvp->data;
> > > +
> > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > > + base = devm_ioremap_resource(&pdev->dev, res);
> >
> > I think the cool function to use these days is
> > devm_platform_get_and_ioremap_resource().
>
> i'll change it, thanks!
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@...e.de>
Regards,
Nicolas
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