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Message-ID: <eb1c2a81-cdd2-3f11-2be9-173bdb4eacc1@redhat.com>
Date:   Mon, 8 Jun 2020 14:40:50 +0200
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Cathy Avery <cavery@...hat.com>, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org
Subject: Re: [PATCH kvm-unit-tests 1/2] svm: Add ability to execute test via
 test_run on a vcpu other than vcpu 0

On 08/06/20 14:27, Cathy Avery wrote:
> When running tests that can result in a vcpu being left in an
> indeterminate state it is useful to be able to run the test on
> a vcpu other than 0. This patch allows test_run to be executed
> on any vcpu indicated by the on_vcpu member of the svm_test struct.
> The initialized state of the vcpu0 registers used to populate the
> vmcb is carried forward to the other vcpus.
> 
> Signed-off-by: Cathy Avery <cavery@...hat.com>
> ---
>  x86/svm.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++-
>  x86/svm.h | 13 +++++++++++++
>  2 files changed, 61 insertions(+), 1 deletion(-)
> 
> diff --git a/x86/svm.c b/x86/svm.c
> index 41685bf..9f7ae7e 100644
> --- a/x86/svm.c
> +++ b/x86/svm.c
> @@ -367,6 +367,45 @@ test_wanted(const char *name, char *filters[], int filter_count)
>          }
>  }
>  
> +static void set_additional_vpcu_regs(struct extra_vcpu_info *info)
> +{
> +    wrmsr(MSR_VM_HSAVE_PA, info->hsave);
> +    wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_SVME);
> +    wrmsr(MSR_EFER, rdmsr(MSR_EFER) | EFER_NX);
> +    write_cr3(info->cr3);
> +    write_cr4(info->cr4);
> +    write_cr0(info->cr0);
> +    write_dr6(info->dr6);
> +    write_dr7(info->dr7);
> +    write_cr2(info->cr2);
> +    wrmsr(MSR_IA32_CR_PAT, info->g_pat);
> +    wrmsr(MSR_IA32_DEBUGCTLMSR, info->dbgctl);
> +}
> +
> +static void get_additional_vcpu_regs(struct extra_vcpu_info *info)
> +{
> +    info->hsave = rdmsr(MSR_VM_HSAVE_PA);
> +    info->cr3 = read_cr3();
> +    info->cr4 = read_cr4();
> +    info->cr0 = read_cr0();
> +    info->dr7 = read_dr7();
> +    info->dr6 = read_dr6();
> +    info->cr2 = read_cr2();
> +    info->g_pat = rdmsr(MSR_IA32_CR_PAT);
> +    info->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR);
> +}

Some tweaks are needed here:

- DR6/DR7/CR2/DEBUGCTL should not be needed, are they?  Same for PAT
since it's not modified by the tests and defaults to the "right" value
(0x0007040600070406ULL) rather than zero.

- HSAVE should be set to a different page for each vCPU

- The on_cpu to set EFER should be in setup_svm, rather than a separate
function

- The on_cpu to set cr0/cr3/cr4 should be in setup_vm.

Paolo

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