lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 9 Jun 2020 15:42:01 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Michael Walle <michael@...le.cc>
Cc:     Lee Jones <lee.jones@...aro.org>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
        david.m.ertman@...el.com, shiraz.saleem@...el.com,
        Rob Herring <robh+dt@...nel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-hwmon@...r.kernel.org, linux-pwm@...r.kernel.org,
        linux-watchdog@...r.kernel.org,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Jean Delvare <jdelvare@...e.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Thierry Reding <thierry.reding@...il.com>,
        Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <maz@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Subject: Re: [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld
 management controller

On Tue, Jun 09, 2020 at 04:38:31PM +0200, Michael Walle wrote:

>   mfd-device@10 {
>     compatible = "simple-regmap", "simple-mfd";
>     reg = <10>;
>     regmap,reg-bits = <8>;
>     regmap,val-bits = <8>;
>     sub-device@0 {
>       compatible = "vendor,sub-device0";
>       reg = <0>;
>     };

A DT binding like this is not a good idea, encoding the details of the
register map into the DT binding makes it an ABI which is begging for
trouble.  I'd also suggest that any device using a generic driver like
this should have a specific compatible string for the device so we can
go back and add quirks later if we need them.

>     ...
> };
> 
> Or if you just want the regmap:
> 
> &soc {
>   regmap: regmap@...0000 {
>     compatible = "simple-regmap";
>     reg = <0xfff0000>;
>     regmap,reg-bits = <16>;
>     regmap,val-bits = <32>;
>   };
> 
>   enet-which-needs-syscon-too@...0000 {
>     vendor,ctrl-regmap = <&regmap>;
>   };
> };
> 
> Similar to the current syscon (which is MMIO only..).
> 
> -michael
> 
> > 
> > I can't think of any reasons why not, off the top of my head.
> > 
> > Does Regmap only deal with shared accesses from multiple devices
> > accessing a single register map, or can it also handle multiple
> > devices communicating over a single I2C channel?
> > 
> > One for Mark perhaps.
> > 
> > > > The issues I wish to resolve using 'simple-mfd' are when sub-devices
> > > > register maps overlap and intertwine.
> > 
> > [...]
> > 
> > > > > > > What do these bits configure?
> > > > >
> > > > > - hardware strappings which have to be there before the board powers
> > > > > up,
> > > > >   like clocking mode for different SerDes settings
> > > > > - "keep-in-reset" bits for onboard peripherals if you want to save
> > > > > power
> > > > > - disable watchdog bits (there is a watchdog which is active right
> > > > > from
> > > > >   the start and supervises the bootloader start and switches to
> > > > > failsafe
> > > > >   mode if it wasn't successfully started)
> > > > > - special boot modes, like eMMC, etc.
> > > > >
> > > > > Think of it as a 16bit configuration word.
> > > >
> > > > And you wish for users to be able to view these at run-time?
> > > 
> > > And esp. change them.
> > > 
> > > > Can they adapt any of them on-the-fly or will the be RO?
> > > 
> > > They are R/W but only will only affect the board behavior after a
> > > reset.
> > 
> > I see.  Makes sense.  This is board controller territory.  Perhaps
> > suitable for inclusion into drivers/soc or drivers/platform.

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ