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Message-ID: <20200609173554.GA1119852@bogus>
Date:   Tue, 9 Jun 2020 11:35:54 -0600
From:   Rob Herring <robh@...nel.org>
To:     Roger Lu <roger.lu@...iatek.com>
Cc:     Kevin Hilman <khilman@...nel.org>,
        Nicolas Boichat <drinkcat@...gle.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Fan Chen <fan.chen@...iatek.com>,
        HenryC Chen <HenryC.Chen@...iatek.com>,
        YT Lee <yt.lee@...iatek.com>,
        Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
        Charles Yang <Charles.Yang@...iatek.com>,
        Angus Lin <Angus.Lin@...iatek.com>,
        Mark Rutland <mark.rutland@....com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Nishanth Menon <nm@...com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org
Subject: Re: [PATCH v9 1/4] dt-bindings: power: avs: add mtk svs dt-bindings

On Tue, Jun 09, 2020 at 06:45:31PM +0800, Roger Lu wrote:
> Document the binding for enabling mtk svs on MediaTek SoC.
> 
> Signed-off-by: Roger Lu <roger.lu@...iatek.com>
> ---
>  .../bindings/power/avs/mtk_svs.yaml           | 141 ++++++++++++++++++
>  1 file changed, 141 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/avs/mtk_svs.yaml
> 
> diff --git a/Documentation/devicetree/bindings/power/avs/mtk_svs.yaml b/Documentation/devicetree/bindings/power/avs/mtk_svs.yaml
> new file mode 100644
> index 000000000000..f16f4eb56ee3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/avs/mtk_svs.yaml
> @@ -0,0 +1,141 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/avs/mtk_svs.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Introduce SVS engine
> +
> +maintainers:
> +  - Kevin Hilman <khilman@...nel.org>
> +  - Nishanth Menon <nm@...com>
> +
> +description: |+
> +  The Smart Voltage Scaling(SVS) engine is a piece of hardware
> +  which has several controllers(banks) for calculating suitable
> +  voltage to different power domains(CPU/GPU/CCI) according to
> +  chip process corner, temperatures and other factors. Then DVFS
> +  driver could apply SVS bank voltage to PMIC/Buck.
> +
> +properties:
> +  compatible:
> +    const: mediatek,mt8183-svs
> +
> +  reg:
> +    description: Address range of the MTK SVS controller.
> +    maxItems: 1
> +
> +  interrupts:
> +    description: IRQ for the MTK SVS controller.
> +    maxItems: 1
> +
> +  clocks:
> +    description: Main clock for svs controller to work.
> +
> +  clock-names:
> +    const: main
> +
> +  nvmem-cells:
> +    maxItems: 2
> +    description:
> +      Phandle to the calibration data provided by a nvmem device.
> +
> +  nvmem-cell-names:
> +    items:
> +      - const: svs-calibration-data
> +      - const: calibration-data
> +
> +patternProperties:
> +  "^svs-(cpu-little|cpu-big|cci|gpu)$":
> +    type: object
> +    description:
> +      Each subnode represents one SVS bank.
> +        - svs-cpu-little (SVS bank device node of little CPU)
> +        - svs-cpu-big (SVS bank device node of big CPU)
> +        - svs-cci (SVS bank device node of CCI)
> +        - svs-gpu (SVS bank device node of GPU)

As I've said before, I don't think these child nodes make sense. All 
this data should already be available elsewhere in the DT.

Rob

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