linux-kernel - Re: [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld management controller

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Date:   Tue, 9 Jun 2020 07:47:35 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Michael Walle <michael@...le.cc>
Cc:     Andy Shevchenko <andy.shevchenko@...il.com>,
        Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
        david.m.ertman@...el.com, shiraz.saleem@...el.com,
        Rob Herring <robh+dt@...nel.org>,
        Mark Brown <broonie@...nel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-hwmon@...r.kernel.org, linux-pwm@...r.kernel.org,
        linux-watchdog@...r.kernel.org,
        linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Jean Delvare <jdelvare@...e.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Thierry Reding <thierry.reding@...il.com>,
        Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <maz@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Subject: Re: [PATCH v4 02/11] mfd: Add support for Kontron sl28cpld
 management controller

On Mon, 08 Jun 2020, Michael Walle wrote:

> Am 2020-06-08 20:56, schrieb Lee Jones:
> > On Mon, 08 Jun 2020, Michael Walle wrote:
> > 
> > > Am 2020-06-08 12:02, schrieb Andy Shevchenko:
> > > > +Cc: some Intel people WRT our internal discussion about similar
> > > > problem and solutions.
> > > >
> > > > On Mon, Jun 8, 2020 at 11:30 AM Lee Jones <lee.jones@...aro.org> wrote:
> > > > > On Sat, 06 Jun 2020, Michael Walle wrote:
> > > > > > Am 2020-06-06 13:46, schrieb Mark Brown:
> > > > > > > On Fri, Jun 05, 2020 at 10:07:36PM +0200, Michael Walle wrote:
> > > > > > > > Am 2020-06-05 12:50, schrieb Mark Brown:
> > > >
> > > > ...
> > > >
> > > > > Right.  I'm suggesting a means to extrapolate complex shared and
> > > > > sometimes intertwined batches of register sets to be consumed by
> > > > > multiple (sub-)devices spanning different subsystems.
> > > > >
> > > > > Actually scrap that.  The most common case I see is a single Regmap
> > > > > covering all child-devices.
> > > >
> > > > Yes, because often we need a synchronization across the entire address
> > > > space of the (parent) device in question.
> > > >
> > > > >  It would be great if there was a way in
> > > > > which we could make an assumption that the entire register address
> > > > > space for a 'tagged' (MFD) device is to be shared (via Regmap) between
> > > > > each of the devices described by its child-nodes.  Probably by picking
> > > > > up on the 'simple-mfd' compatible string in the first instance.
> > > > >
> > > > > Rob, is the above something you would contemplate?
> > > > >
> > > > > Michael, do your register addresses overlap i.e. are they intermingled
> > > > > with one another?  Do multiple child devices need access to the same
> > > > > registers i.e. are they shared?
> > > 
> > > No they don't overlap, expect for maybe the version register, which is
> > > just there once and not per function block.
> > 
> > Then what's stopping you having each device Regmap their own space?
> 
> Because its just one I2C device, AFAIK thats not possible, right?

Not sure what (if any) the restrictions are.

I can't think of any reasons why not, off the top of my head.

Does Regmap only deal with shared accesses from multiple devices
accessing a single register map, or can it also handle multiple
devices communicating over a single I2C channel?

One for Mark perhaps.

> > The issues I wish to resolve using 'simple-mfd' are when sub-devices
> > register maps overlap and intertwine.

[...]

> > > > > What do these bits configure?
> > > 
> > > - hardware strappings which have to be there before the board powers
> > > up,
> > >   like clocking mode for different SerDes settings
> > > - "keep-in-reset" bits for onboard peripherals if you want to save
> > > power
> > > - disable watchdog bits (there is a watchdog which is active right
> > > from
> > >   the start and supervises the bootloader start and switches to
> > > failsafe
> > >   mode if it wasn't successfully started)
> > > - special boot modes, like eMMC, etc.
> > > 
> > > Think of it as a 16bit configuration word.
> > 
> > And you wish for users to be able to view these at run-time?
> 
> And esp. change them.
> 
> > Can they adapt any of them on-the-fly or will the be RO?
> 
> They are R/W but only will only affect the board behavior after a reset.

I see.  Makes sense.  This is board controller territory.  Perhaps
suitable for inclusion into drivers/soc or drivers/platform.

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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