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Message-ID: <a6a241d4-309d-c022-b61b-050b90471324@cogentembedded.com>
Date:   Wed, 10 Jun 2020 12:21:20 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:     Kai-Heng Feng <kai.heng.feng@...onical.com>,
        mathias.nyman@...el.com
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Alan Stern <stern@...land.harvard.edu>,
        Eugeniu Rosca <erosca@...adit-jv.com>,
        Qi Zhou <atmgnd@...look.com>,
        Hardik Gajjar <hgajjar@...adit-jv.com>,
        Keiya Nobuta <nobuta.keiya@...itsu.com>,
        Jason Yan <yanaijie@...wei.com>,
        David Heinzelmann <heinzelmann.david@...il.com>,
        "open list:USB SUBSYSTEM" <linux-usb@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] USB: hub: Suspend and resume port with LPM enabled

Hello!

On 10.06.2020 9:42, Kai-Heng Feng wrote:

> USB2 devices with LPM enabled may interrupt the system suspend:
> [  932.510475] usb 1-7: usb suspend, wakeup 0
> [  932.510549] hub 1-0:1.0: hub_suspend
> [  932.510581] usb usb1: bus suspend, wakeup 0
> [  932.510590] xhci_hcd 0000:00:14.0: port 9 not suspended
> [  932.510593] xhci_hcd 0000:00:14.0: port 8 not suspended
> ..
> [  932.520323] xhci_hcd 0000:00:14.0: Port change event, 1-7, id 7, portsc: 0x400e03
> ..
> [  932.591405] PM: pci_pm_suspend(): hcd_pci_suspend+0x0/0x30 returns -16
> [  932.591414] PM: dpm_run_callback(): pci_pm_suspend+0x0/0x160 returns -16
> [  932.591418] PM: Device 0000:00:14.0 failed to suspend async: error -16
> 
> During system suspend, USB core will let HC suspends the device if it

    Suspend. Perhaps can be fixed while applying...

> doesn't have remote wakeup enabled and doesn't have any children.
> However, from the log above we can see that the usb 1-7 doesn't get bus
> suspended due to not in U0, because it requires a longer period for
> disabling LPM. After a while the port finished its U2 -> U0 transition,
> interrupts the suspend process.
> 
> Though PLC shouldn't be set for U2 -> U0 case, we can avoid all that by
> directly put the port from U0/U1/U2 to U3, and solves this issue.
            ^ putting                            ^ it?

> Suggested-by: Mathias Nyman <mathias.nyman@...ux.intel.com>
> Signed-off-by: Kai-Heng Feng <kai.heng.feng@...onical.com>
[...]

MBR, Sergei

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