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Message-ID: <CAF6AEGtczybJU=_MUnGK3uzfnbgh-PDgAZmp7Fod=9Fc0T=fjg@mail.gmail.com>
Date: Thu, 11 Jun 2020 08:15:03 -0700
From: Rob Clark <robdclark@...il.com>
To: Krishna Manikandan <mkrishn@...eaurora.org>
Cc: dri-devel <dri-devel@...ts.freedesktop.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
freedreno <freedreno@...ts.freedesktop.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Kalyan Thota <kalyan_t@...eaurora.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Sean Paul <seanpaul@...omium.org>,
"Kristian H. Kristensen" <hoegsberg@...omium.org>,
nganji@...eaurora.org, Matthias Kaehlcke <mka@...omium.org>,
John Stultz <john.stultz@...aro.org>,
Douglas Anderson <dianders@...omium.org>,
Abhinav Kumar <abhinavk@...eaurora.org>,
Jordan Crouse <jcrouse@...eaurora.org>
Subject: Re: [v1] drm/msm/dpu: request for display color blocks based on hw
catalog entry
On Thu, Jun 11, 2020 at 5:55 AM Krishna Manikandan
<mkrishn@...eaurora.org> wrote:
>
> From: Kalyan Thota <kalyan_t@...eaurora.org>
>
> Request for color processing blocks only if they are
> available in the display hw catalog and they are
> sufficient in number for the selection.
>
I believe this should have:
Fixes: e47616df008b ("drm/msm/dpu: add support for color processing
blocks in dpu driver")
> Signed-off-by: Kalyan Thota <kalyan_t@...eaurora.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 63976dc..9f8de77 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -521,7 +521,7 @@ static struct msm_display_topology dpu_encoder_get_topology(
> struct dpu_kms *dpu_kms,
> struct drm_display_mode *mode)
> {
> - struct msm_display_topology topology;
> + struct msm_display_topology topology = {0};
> int i, intf_count = 0;
>
> for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++)
> @@ -537,7 +537,8 @@ static struct msm_display_topology dpu_encoder_get_topology(
> * 1 LM, 1 INTF
> * 2 LM, 1 INTF (stream merge to support high resolution interfaces)
> *
> - * Adding color blocks only to primary interface
> + * Adding color blocks only to primary interface if available in
> + * sufficient number
> */
> if (intf_count == 2)
> topology.num_lm = 2;
> @@ -546,8 +547,11 @@ static struct msm_display_topology dpu_encoder_get_topology(
> else
> topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1;
>
> - if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI)
> - topology.num_dspp = topology.num_lm;
> + if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) {
> + if (dpu_kms->catalog->dspp &&
> + (dpu_kms->catalog->dspp_count >= topology.num_lm))
> + topology.num_dspp = topology.num_lm;
> + }
>
> topology.num_enc = 0;
> topology.num_intf = intf_count;
> --
> 1.9.1
>
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