linux-kernel - Re: [PATCH] riscv/atomic: Fix sign extension for RV64I

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Message-ID: <CAKwvOdnnP3cHZMjgV355r=OO7MDLmSoOoU_ch8+ByRaJEkF=rg@mail.gmail.com>
Date:   Thu, 11 Jun 2020 11:49:51 -0700
From:   Nick Desaulniers <ndesaulniers@...gle.com>
To:     Nathan Huckleberry <nhuck@...gle.com>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org,
        LKML <linux-kernel@...r.kernel.org>,
        clang-built-linux <clang-built-linux@...glegroups.com>
Subject: Re: [PATCH] riscv/atomic: Fix sign extension for RV64I

On Thu, Jun 11, 2020 at 11:34 AM 'Nathan Huckleberry' via Clang Built
Linux <clang-built-linux@...glegroups.com> wrote:
>
> The argument passed to cmpxchg is not guaranteed to be sign
> extended, but lr.w sign extends on RV64I.

I had a hard time finding documentation on this sign extension. Is
lr.w just the atomic version of lw?

https://content.riscv.org/wp-content/uploads/2019/06/riscv-spec.pdf
pdf page 54, printed page 38 says:
   The LW instruction loads a 32-bit value from memory and sign-extends
    this to 64 bits before storing it in register rd for RV64I.

> This makes cmpxchg
> fail on clang built kernels when __old is negative.
>
> To fix this, we just cast __old to long which sign extends on
> RV64I. With this fix, clang built RISC-V kernels now boot.

Oh, indeed, nice!  Thanks for digging into this issue, and sending the patch.
Tested-by: Nick Desaulniers <ndesaulniers@...gle.com> # QEMU boot, clang build

>
> Link: https://github.com/ClangBuiltLinux/linux/issues/867
> Cc: clang-built-linux@...glegroups.com
> Signed-off-by: Nathan Huckleberry <nhuck@...gle.com>
> ---
>  arch/riscv/include/asm/cmpxchg.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
> index d969bab4a26b..262e5bbb2776 100644
> --- a/arch/riscv/include/asm/cmpxchg.h
> +++ b/arch/riscv/include/asm/cmpxchg.h
> @@ -179,7 +179,7 @@
>                         "       bnez %1, 0b\n"                          \
>                         "1:\n"                                          \
>                         : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)    \
> -                       : "rJ" (__old), "rJ" (__new)                    \
> +                       : "rJ" ((long)__old), "rJ" (__new)              \
>                         : "memory");                                    \
>                 break;                                                  \
>         case 8:                                                         \
> @@ -224,7 +224,7 @@
>                         RISCV_ACQUIRE_BARRIER                           \
>                         "1:\n"                                          \
>                         : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)    \
> -                       : "rJ" (__old), "rJ" (__new)                    \
> +                       : "rJ" ((long)__old), "rJ" (__new)              \
>                         : "memory");                                    \
>                 break;                                                  \
>         case 8:                                                         \
> @@ -270,7 +270,7 @@
>                         "       bnez %1, 0b\n"                          \
>                         "1:\n"                                          \
>                         : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)    \
> -                       : "rJ" (__old), "rJ" (__new)                    \
> +                       : "rJ" ((long)__old), "rJ" (__new)              \
>                         : "memory");                                    \
>                 break;                                                  \
>         case 8:                                                         \
> @@ -316,7 +316,7 @@
>                         "       fence rw, rw\n"                         \
>                         "1:\n"                                          \
>                         : "=&r" (__ret), "=&r" (__rc), "+A" (*__ptr)    \
> -                       : "rJ" (__old), "rJ" (__new)                    \
> +                       : "rJ" ((long)__old), "rJ" (__new)              \
>                         : "memory");                                    \
>                 break;                                                  \
>         case 8:                                                         \
> --
-- 
Thanks,
~Nick Desaulniers