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Message-Id: <20200611191750.28096-5-a.fatoum@pengutronix.de>
Date: Thu, 11 Jun 2020 21:17:45 +0200
From: Ahmad Fatoum <a.fatoum@...gutronix.de>
To: Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>,
Knud Poulsen <knpo@...e.org>
Cc: linux-watchdog@...r.kernel.org, kernel@...gutronix.de,
Ahmad Fatoum <a.fatoum@...gutronix.de>, stable@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 4/8] watchdog: f71808e_wdt: clear watchdog timeout occurred flag
The flag indicating a watchdog timeout having occurred normally persists
till Power-On Reset of the Fintek Super I/O chip. The user can clear it
by writing a `1' to the bit.
The driver doesn't offer a restart method, so regular system reboot
might not reset the Super I/O and if the watchdog isn't enabled, we
won't touch the register containing the bit on the next boot.
In this case all subsequent regular reboots will be wrongly flagged
by the driver as being caused by the watchdog.
Fix this by having the flag cleared after read. This is also done by
other drivers like those for the i6300esb and mpc8xxx_wdt.
Fixes: b97cb21a4634 ("watchdog: f71808e_wdt: Fix WDTMOUT_STS register read")
Cc: stable@...r.kernel.org
Signed-off-by: Ahmad Fatoum <a.fatoum@...gutronix.de>
---
drivers/watchdog/f71808e_wdt.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 8e5584c54423..26bf366aebc2 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -706,6 +706,13 @@ static int __init watchdog_init(int sioaddr)
wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
+ /*
+ * We don't want WDTMOUT_STS to stick around till regular reboot.
+ * Write 1 to the bit to clear it to zero.
+ */
+ superio_outb(sioaddr, F71808FG_REG_WDT_CONF,
+ wdt_conf | BIT(F71808FG_FLAG_WDTMOUT_STS));
+
superio_exit(sioaddr);
err = watchdog_set_timeout(timeout);
--
2.27.0
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