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Message-Id: <1591845911-10197-1-git-send-email-yilun.xu@intel.com>
Date:   Thu, 11 Jun 2020 11:25:05 +0800
From:   Xu Yilun <yilun.xu@...el.com>
To:     broonie@...nel.org, linux-spi@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     trix@...hat.com, yilun.xu@...el.com, hao.wu@...el.com,
        matthew.gerlach@...ux.intel.com, russell.h.weight@...el.com
Subject: [PATCH 0/6] Add more configuration and regmap support for spi-altera

This patchset adds platform_data for spi-altera, to enable more IP
configurations, and creating specific spi client devices. It also adds
regmap support, to enable the indirect access to this IP.

We have a PCIE based FPGA platform which integrates this IP to communicate
with a BMC chip (Intel MAX10) over SPI. The IP is configured as 32bit data
width. There is also an indirect access interface in FPGA for host to
access the registers of this IP. This patchset enables this use case.

Matthew Gerlach (1):
  spi: altera: fix size mismatch on 64 bit processors

Xu Yilun (5):
  spi: altera: add 32bit data width transfer support.
  spi: altera: add SPI core parameters support via platform data.
  spi: altera: add platform data for slave information.
  spi: altera: use regmap instead of direct mmio register access
  spi: altera: move driver name string to header file

 drivers/spi/Kconfig        |   1 +
 drivers/spi/spi-altera.c   | 161 +++++++++++++++++++++++++++++++++++++--------
 include/linux/spi/altera.h |  37 +++++++++++
 3 files changed, 171 insertions(+), 28 deletions(-)
 create mode 100644 include/linux/spi/altera.h

-- 
2.7.4

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