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Message-Id: <1591944589-14357-1-git-send-email-sivaprak@codeaurora.org>
Date: Fri, 12 Jun 2020 12:19:47 +0530
From: Sivaprakash Murugesan <sivaprak@...eaurora.org>
To: miquel.raynal@...tlin.com, richard@....at, vigneshr@...com,
peter.ujfalusi@...com, sivaprak@...eaurora.org,
boris.brezillon@...labora.com, architt@...eaurora.org,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH V3 0/2] Fix issues related to register access in IPQ NAND
Patch 1: avoids register write to unavailable SFLASHC_BURST_CFG register
Patch 2: set BAM mode only if not set by bootloader
[V3]
* Addressed review comments from Miquel
[V2]
* As per review comments from Miquèl split the original patch into two
addressing independent issues.
Sivaprakash Murugesan (2):
mtd: rawnand: qcom: remove write to unavailable register
mtd: rawnand: qcom: set BAM mode only if not set already
drivers/mtd/nand/raw/qcom_nandc.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
--
2.7.4
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