[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <ccfa1f8a945100d93f88a0a8c369917931855d0f.1591344965.git.greentime.hu@sifive.com>
Date: Fri, 12 Jun 2020 15:09:58 +0800
From: Greentime Hu <greentime.hu@...ive.com>
To: greentime.hu@...ive.com, oleg@...hat.com, guoren@...ux.alibaba.com,
vincent.chen@...ive.com, paul.walmsley@...ive.com,
palmerdabbelt@...gle.com, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 09/13] riscv: Add vector struct and assembler definitions
Add vector state context struct in struct thread and asm-offsets.c
definitions.
The vector registers will be saved in datap pointer of __riscv_v_state. It
will be dynamically allocated in kernel space. It will be put right after
the __riscv_v_state data structure in user space.
[guoren@...ux.alibaba.com: first version vector porting]
Signed-off-by: Greentime Hu <greentime.hu@...ive.com>
Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
---
arch/riscv/include/asm/processor.h | 1 +
arch/riscv/include/uapi/asm/ptrace.h | 13 +++++++++++++
arch/riscv/kernel/asm-offsets.c | 8 ++++++++
3 files changed, 22 insertions(+)
diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h
index 3ddb798264f1..217273375cfb 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -32,6 +32,7 @@ struct thread_struct {
unsigned long sp; /* Kernel mode stack */
unsigned long s[12]; /* s[0]: frame pointer */
struct __riscv_d_ext_state fstate;
+ struct __riscv_v_state vstate;
};
#define INIT_THREAD { \
diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h
index 882547f6bd5c..661b0466b850 100644
--- a/arch/riscv/include/uapi/asm/ptrace.h
+++ b/arch/riscv/include/uapi/asm/ptrace.h
@@ -77,6 +77,19 @@ union __riscv_fp_state {
struct __riscv_q_ext_state q;
};
+struct __riscv_v_state {
+ __u32 magic;
+ __u32 size;
+ unsigned long vstart;
+ unsigned long vl;
+ unsigned long vtype;
+ unsigned long vcsr;
+ void *datap;
+#if __riscv_xlen == 32
+ __u32 __padding;
+#endif
+} __attribute__((aligned(16)));
+
#endif /* __ASSEMBLY__ */
#endif /* _UAPI_ASM_RISCV_PTRACE_H */
diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c
index 07cb9c10de4e..6627fde230b2 100644
--- a/arch/riscv/kernel/asm-offsets.c
+++ b/arch/riscv/kernel/asm-offsets.c
@@ -70,6 +70,14 @@ void asm_offsets(void)
OFFSET(TASK_THREAD_F31, task_struct, thread.fstate.f[31]);
OFFSET(TASK_THREAD_FCSR, task_struct, thread.fstate.fcsr);
+ OFFSET(RISCV_V_STATE_MAGIC, __riscv_v_state, magic);
+ OFFSET(RISCV_V_STATE_SIZE, __riscv_v_state, size);
+ OFFSET(RISCV_V_STATE_VSTART, __riscv_v_state, vstart);
+ OFFSET(RISCV_V_STATE_VL, __riscv_v_state, vl);
+ OFFSET(RISCV_V_STATE_VTYPE, __riscv_v_state, vtype);
+ OFFSET(RISCV_V_STATE_VCSR, __riscv_v_state, vcsr);
+ OFFSET(RISCV_V_STATE_DATAP, __riscv_v_state, datap);
+
DEFINE(PT_SIZE, sizeof(struct pt_regs));
OFFSET(PT_EPC, pt_regs, epc);
OFFSET(PT_RA, pt_regs, ra);
--
2.27.0
Powered by blists - more mailing lists