[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200612203935.GH2497@hirez.programming.kicks-ass.net>
Date: Fri, 12 Jun 2020 22:39:35 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Borislav Petkov <bp@...en8.de>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>,
x86-ml <x86@...nel.org>, lkml <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH] x86/msr: Filter MSR writes
On Fri, Jun 12, 2020 at 07:48:01PM +0200, Borislav Petkov wrote:
> On Fri, Jun 12, 2020 at 10:20:03AM -0700, Linus Torvalds wrote:
> > Since you already added the filtering, this looks fairly sane.
> >
> > IOW, what MSR's do we expect people to maybe write to normally? You
> > added MSR_IA32_ENERGY_PERF_BIAS as an allowed MST, maybe there are
> > others?
>
> Right, this MSR is being written by cpupower in tools/. My search was
> confined within the kernel source only so there very likely are others.
So that tool writing to /dev/msr has already caused pain; the direct
result is that the intel pstate driver doesn't want to use an MSR shadow
variable to avoid RDMSR because that'd loose input.
https://lkml.org/lkml/2019/3/25/310
(sorry, that's what google found me)
So ideally we'd just disallow it too. It already has a sysfs file (per
those patches):
Documentation/admin-guide/pm/intel_epb.rst
Powered by blists - more mailing lists