lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAD=FV=WjvAWVmq3fTh=_f2p1Dv+sXg1RV-CqZr8KRgHe8_wT0w@mail.gmail.com>
Date:   Fri, 12 Jun 2020 14:59:14 -0700
From:   Doug Anderson <dianders@...omium.org>
To:     Ravi Kumar Bokka <rbokka@...eaurora.org>
Cc:     Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        dhavalp@...eaurora.org, mturney@...eaurora.org,
        sparate@...eaurora.org, c_rbokka@...eaurora.org,
        mkurumel@...eaurora.org
Subject: Re: [RFC v2 1/3] dt-bindings: nvmem: Add devicetree bindings for qfprom-efuse

Hi,

On Thu, Jun 11, 2020 at 2:49 AM Ravi Kumar Bokka <rbokka@...eaurora.org> wrote:
>
> This patch adds dt-bindings document for qfprom-efuse controller.
>
> Signed-off-by: Ravi Kumar Bokka <rbokka@...eaurora.org>
> ---
>  .../devicetree/bindings/nvmem/qfprom.yaml          | 52 ++++++++++++++++++++++
>  1 file changed, 52 insertions(+)

Overall comment: I reviewed your v1 series and so I'm obviously
interested in your series.  Please CC me on future versions.

I would also note that, since this is relevant to Qualcomm SoCs that
you probably should be CCing "linux-arm-msm@...r.kernel.org" on your
series.


>  create mode 100644 Documentation/devicetree/bindings/nvmem/qfprom.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qfprom.yaml
> new file mode 100644
> index 0000000..7c8fc31
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/qfprom.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/qfprom.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Technologies Inc, QFPROM Efuse bindings
> +
> +maintainers:
> +  - Ravi Kumar Bokka <rbokka@...eaurora.org>
> +
> +allOf:
> +  - $ref: "nvmem.yaml#"
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,qfprom

As per discussion in patch #1, I believe SoC compatible should be here
too in case it is ever needed.  This is standard practice for dts
files for IP blocks embedded in an SoC.  AKA, this should be:

    items:
      - enum:
          - qcom,apq8064-qfprom
          - qcom,apq8084-qfprom
          - qcom,msm8974-qfprom
          - qcom,msm8916-qfprom
          - qcom,msm8996-qfprom
          - qcom,msm8998-qfprom
          - qcom,qcs404-qfprom
          - qcom,sc7180-qfprom
          - qcom,sdm845-qfprom
      - const: qcom,qfprom

NOTE: old SoCs won't have both of these and thus they will get flagged
with "dtbs_check", but I believe that's fine (Rob can correct me if
I'm wrong).  The code should still work OK if the SoC isn't there but
it would be good to fix old dts files to have the SoC specific string
too.


> +
> +  reg:
> +    maxItems: 3

Please address feedback feedback on v1.  If you disagree with my
feedback it's OK to say so (I make no claims of being always right),
but silently ignoring my feedback and sending the next version doesn't
make me feel like it's a good use of my time to keep reviewing your
series.  Specifically I suggested that you actually add descriptions
rather than just putting "maxItems: 3".

With all that has been discussed, I think the current best thing to
put there is:

    # If the QFPROM is read-only OS image then only the corrected region
    # needs to be provided.  If the QFPROM is writable then all 3 regions
    # must be provided.
    oneOf:
      - items:
          - description: The start of the corrected region.
      - items:
          - description: The start of the raw region.
          - description: The start of the config region.
          - description: The start of the corrected region.

> +

You missed a bunch of things that you should document:

  # Clocks must be provided if QFPROM is writable from the OS image.
  clocks:
    maxItems: 1
  clock-names:
    const: sec

  # Supply reference must be provided if QFPROM is writable from the OS image.
  vcc-supply:
    description: Our power supply.

  # Needed if any child nodes are present.
  "#address-cells":
    const: 1
  "#size-cells":
    const: 1

> +required:
> +   - compatible
> +   - reg
> +   - reg-names

reg-names is discouraged.  Please remove.  I always point people here
as a reference:

https://lore.kernel.org/r/CAL_Jsq+MMunmVWqeW9v2RyzsMKP+=kMzeTHNMG4JDHM7Fy0HBg@mail.gmail.com/

You can just figure out whether there are 3 register fields or 1 register field.


> +   - clocks
> +   - clock-names

You can't retroactively make things required.  In read-only mode I
believe we don't require clocks/clock-names.  Presumably the clock is
only needed if we're writing?


> +examples:
> +  - |
> +    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
> +
> +    qfprom@...000 {
> +       compatible = "qcom,qfprom";

As pointed out by Rob H in v1, you have a whole bunch of tabs in here
that "dt_binding_check" yells about.  Please fix and confirm that you
ran "dt_binding_check" on your bindings and they passed with no
errors.  This is another case where someone took the time to respond
to your v1 but you didn't address their comments in sending v2.


> +       reg = <0 0x00780000 0 0x7a0>,
> +             <0 0x00782000 0 0x100>,
> +             <0 0x00784000 0 0x8ff>;
> +       reg-names = "raw", "conf", "corrected";

You are missing #address-cells and #size-cells, which are required
because you have a sub-node.


> +       clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
> +       clock-names = "secclk";

As pointed out in v1, people don't like clock names to end in "clk".
Just call this "sec".


> +       qusb2p_hstx_trim: hstx-trim-primary@25b {
> +               reg = <0x25b 0x1>;
> +               bits = <1 3>;
> +       };
> +    };
> +
> +    &qfprom {
> +        vcc-supply = <&vreg_l11a_1p8>;
> +    };

Just fold the vcc-supply into the above node.  Note that your current
example refers to a phandle that doesn't exist.


> +
> --
> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by the Linux Foundation.

For your edification, I have placed a patch that fixes all my own
review feedback (and passes dt_binding_check) at:

https://crrev.com/c/2243853

Please either fold this into your next patch or provide comments about
why you aren't taking one of my suggestions.

-Doug

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ