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Message-ID: <7554ef7d-6d85-fa5f-2018-415f2260fa60@huawei.com>
Date: Mon, 15 Jun 2020 15:51:19 +0100
From: John Garry <john.garry@...wei.com>
To: Namhyung Kim <namhyung@...nel.org>
CC: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>, <will@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linuxarm@...wei.com>,
Ian Rogers <irogers@...gle.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] perf pmu: Improve CPU core PMU HW event list ordering
On 15/06/2020 15:36, Namhyung Kim wrote:>> static int cmp_sevent(const
void *a, const void *b)
>> @@ -1416,6 +1417,12 @@ static int cmp_sevent(const void *a, const void *b)
>> if (n)
>> return n;
>> }
>> +
>> + if (as->is_cpu && !bs->is_cpu)
>> + return -1;
>> + else if (!as->is_cpu && bs->is_cpu)
>> + return 1;
>> +
> This can be:
>
> if (as->is_cpu != bs->is_cpu)
> return bs->is_cpu - as->is_cpu;
>
That's more concise, but maybe not as readable at a glance. I don't mind
though, so can change.
Thanks,
John
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