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Message-ID: <20200616053121.GE23105@xsang-OptiPlex-9020>
Date: Tue, 16 Jun 2020 13:31:21 +0800
From: kernel test robot <lkp@...el.com>
To: Grzegorz Jaszczyk <jaz@...ihalf.com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Subject: drivers/pci/controller/pci-mvebu.c:368:17: sparse: sparse:
restricted __le16 degrades to integer
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: f82e7b57b5fc48199e2f26ffafe2f96f7338ad3d
commit: e0d9d30b73548fbfe5c024ed630169bdc9a08aee PCI: pci-bridge-emul: Fix big-endian support
date: 8 months ago
:::::: branch date: 2 hours ago
:::::: commit date: 8 months ago
config: arm-randconfig-s032-20200613 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.1-250-g42323db3-dirty
git checkout e0d9d30b73548fbfe5c024ed630169bdc9a08aee
# save the attached .config to linux build tree
make W=1 C=1 ARCH=arm CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/pci/controller/pci-mvebu.c:368:17: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:368:38: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:369:19: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:389:30: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:392:31: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:406:17: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:406:34: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:407:19: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:419:30: sparse: sparse: restricted __le16 degrades to integer
drivers/pci/controller/pci-mvebu.c:420:31: sparse: sparse: restricted __le16 degrades to integer
>> drivers/pci/controller/pci-mvebu.c:483:39: sparse: sparse: invalid assignment: &=
>> drivers/pci/controller/pci-mvebu.c:483:39: sparse: left side has type restricted __le16
>> drivers/pci/controller/pci-mvebu.c:483:39: sparse: right side has type int
drivers/pci/controller/pci-mvebu.c:557:28: sparse: sparse: symbol 'mvebu_pci_bridge_emul_ops' was not declared. Should it be static?
>> drivers/pci/controller/pci-mvebu.c:571:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le16 [usertype] vendor @@ got int @@
>> drivers/pci/controller/pci-mvebu.c:571:29: sparse: expected restricted __le16 [usertype] vendor
>> drivers/pci/controller/pci-mvebu.c:571:29: sparse: got int
>> drivers/pci/controller/pci-mvebu.c:572:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le16 [usertype] device @@ got unsigned int @@
>> drivers/pci/controller/pci-mvebu.c:572:29: sparse: expected restricted __le16 [usertype] device
>> drivers/pci/controller/pci-mvebu.c:572:29: sparse: got unsigned int
>> drivers/pci/controller/pci-mvebu.c:573:37: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 [usertype] class_revision @@ got unsigned int @@
>> drivers/pci/controller/pci-mvebu.c:573:37: sparse: expected restricted __le32 [usertype] class_revision
drivers/pci/controller/pci-mvebu.c:573:37: sparse: got unsigned int
drivers/pci/controller/pci-mvebu.c:716:31: sparse: sparse: incorrect type in return expression (different address spaces) @@ expected void [noderef] <asn:2> * @@ got void * @@
drivers/pci/controller/pci-mvebu.c:716:31: sparse: expected void [noderef] <asn:2> *
drivers/pci/controller/pci-mvebu.c:716:31: sparse: got void *
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e0d9d30b73548fbfe5c024ed630169bdc9a08aee
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git remote update linus
git checkout e0d9d30b73548fbfe5c024ed630169bdc9a08aee
vim +368 drivers/pci/controller/pci-mvebu.c
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 360
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 361 static void mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port)
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 362 {
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 363 struct mvebu_pcie_window desired = {};
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 364 struct pci_bridge_emul_conf *conf = &port->bridge.conf;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 365
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 366 /* Are the new iobase/iolimit values invalid? */
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 367 if (conf->iolimit < conf->iobase ||
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 @368 conf->iolimitupper < conf->iobaseupper ||
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 369 !(conf->command & PCI_COMMAND_IO)) {
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 370 mvebu_pcie_set_window(port, port->io_target, port->io_attr,
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 371 &desired, &port->iowin);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 372 return;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 373 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 374
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 375 if (!mvebu_has_ioport(port)) {
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 376 dev_WARN(&port->pcie->pdev->dev,
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 377 "Attempt to set IO when IO is disabled\n");
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 378 return;
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 379 }
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 380
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 381 /*
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 382 * We read the PCI-to-PCI bridge emulated registers, and
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 383 * calculate the base address and size of the address decoding
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 384 * window to setup, according to the PCI-to-PCI bridge
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 385 * specifications. iobase is the bus address, port->iowin_base
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 386 * is the CPU address.
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 387 */
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 388 desired.remap = ((conf->iobase & 0xF0) << 8) |
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 389 (conf->iobaseupper << 16);
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 390 desired.base = port->pcie->io.start + desired.remap;
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 391 desired.size = ((0xFFF | ((conf->iolimit & 0xF0) << 8) |
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 392 (conf->iolimitupper << 16)) -
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 393 desired.remap) +
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 394 1;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 395
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 396 mvebu_pcie_set_window(port, port->io_target, port->io_attr, &desired,
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 397 &port->iowin);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 398 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 399
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 400 static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port)
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 401 {
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 402 struct mvebu_pcie_window desired = {.remap = MVEBU_MBUS_NO_REMAP};
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 403 struct pci_bridge_emul_conf *conf = &port->bridge.conf;
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 404
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 405 /* Are the new membase/memlimit values invalid? */
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 406 if (conf->memlimit < conf->membase ||
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 407 !(conf->command & PCI_COMMAND_MEMORY)) {
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 408 mvebu_pcie_set_window(port, port->mem_target, port->mem_attr,
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 409 &desired, &port->memwin);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 410 return;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 411 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 412
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 413 /*
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 414 * We read the PCI-to-PCI bridge emulated registers, and
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 415 * calculate the base address and size of the address decoding
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 416 * window to setup, according to the PCI-to-PCI bridge
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 417 * specifications.
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 418 */
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 419 desired.base = ((conf->membase & 0xFFF0) << 16);
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 420 desired.size = (((conf->memlimit & 0xFFF0) << 16) | 0xFFFFF) -
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 421 desired.base + 1;
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 422
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 423 mvebu_pcie_set_window(port, port->mem_target, port->mem_attr, &desired,
d9bf28e2650fe3 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2016-12-12 424 &port->memwin);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 425 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 426
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 427 static pci_bridge_emul_read_status_t
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 428 mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 429 int reg, u32 *value)
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 430 {
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 431 struct mvebu_pcie_port *port = bridge->data;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 432
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 433 switch (reg) {
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 434 case PCI_EXP_DEVCAP:
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 435 *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_DEVCAP);
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 436 break;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 437
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 438 case PCI_EXP_DEVCTL:
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 439 *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_DEVCTL) &
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 440 ~(PCI_EXP_DEVCTL_URRE | PCI_EXP_DEVCTL_FERE |
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 441 PCI_EXP_DEVCTL_NFERE | PCI_EXP_DEVCTL_CERE);
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 442 break;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 443
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 444 case PCI_EXP_LNKCAP:
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 445 /*
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 446 * PCIe requires the clock power management capability to be
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 447 * hard-wired to zero for downstream ports
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 448 */
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 449 *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) &
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 450 ~PCI_EXP_LNKCAP_CLKPM;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 451 break;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 452
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 453 case PCI_EXP_LNKCTL:
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 454 *value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 455 break;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 456
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 457 case PCI_EXP_SLTCTL:
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 458 *value = PCI_EXP_SLTSTA_PDS << 16;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 459 break;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 460
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 461 case PCI_EXP_RTSTA:
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 462 *value = mvebu_readl(port, PCIE_RC_RTSTA);
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 463 break;
dc0352ab0b2a0c drivers/pci/host/pci-mvebu.c Russell King 2015-10-03 464
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 465 default:
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 466 return PCI_BRIDGE_EMUL_NOT_HANDLED;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 467 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 468
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 469 return PCI_BRIDGE_EMUL_HANDLED;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 470 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 471
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 472 static void
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 473 mvebu_pci_bridge_emul_base_conf_write(struct pci_bridge_emul *bridge,
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 474 int reg, u32 old, u32 new, u32 mask)
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 475 {
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 476 struct mvebu_pcie_port *port = bridge->data;
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 477 struct pci_bridge_emul_conf *conf = &bridge->conf;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 478
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 479 switch (reg) {
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 480 case PCI_COMMAND:
43a16f94445310 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 481 {
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 482 if (!mvebu_has_ioport(port))
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 @483 conf->command &= ~PCI_COMMAND_IO;
641e674d6c0f97 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 484
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 485 if ((old ^ new) & PCI_COMMAND_IO)
43a16f94445310 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 486 mvebu_pcie_handle_iobase_change(port);
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 487 if ((old ^ new) & PCI_COMMAND_MEMORY)
43a16f94445310 drivers/pci/host/pci-mvebu.c Jason Gunthorpe 2013-11-26 488 mvebu_pcie_handle_membase_change(port);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 489
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 490 break;
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 491 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 492
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 493 case PCI_IO_BASE:
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 494 /*
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 495 * We keep bit 1 set, it is a read-only bit that
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 496 * indicates we support 32 bits addressing for the
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 497 * I/O
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 498 */
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 499 conf->iobase |= PCI_IO_RANGE_TYPE_32;
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 500 conf->iolimit |= PCI_IO_RANGE_TYPE_32;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 501 mvebu_pcie_handle_iobase_change(port);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 502 break;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 503
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 504 case PCI_MEMORY_BASE:
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 505 mvebu_pcie_handle_membase_change(port);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 506 break;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 507
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 508 case PCI_IO_BASE_UPPER16:
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 509 mvebu_pcie_handle_iobase_change(port);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 510 break;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 511
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 512 case PCI_PRIMARY_BUS:
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 513 mvebu_pcie_set_local_bus_nr(port, conf->secondary_bus);
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 514 break;
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 515
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 516 default:
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 517 break;
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 518 }
1f08673eef1236 drivers/pci/controller/pci-mvebu.c Thomas Petazzoni 2018-10-18 519 }
45361a4fe44641 drivers/pci/host/pci-mvebu.c Thomas Petazzoni 2013-05-16 520
:::::: The code at line 368 was first introduced by commit
:::::: 1f08673eef1236f7d02d93fcf596bb8531ef0d12 PCI: mvebu: Convert to PCI emulated bridge config space
:::::: TO: Thomas Petazzoni <thomas.petazzoni@...tlin.com>
:::::: CC: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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