linux-kernel - Re: [RESEND v5 2/2] phy: intel: Add Keem Bay eMMC PHY support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20200617140107.GF2428291@smile.fi.intel.com>
Date:   Wed, 17 Jun 2020 17:01:07 +0300
From:   Andy Shevchenko <andriy.shevchenko@...el.com>
To:     Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>
Cc:     kishon@...com, vkoul@...nel.org, robh+dt@...nel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        adrian.hunter@...el.com
Subject: Re: [RESEND v5 2/2] phy: intel: Add Keem Bay eMMC PHY support

On Wed, Jun 17, 2020 at 07:32:52AM +0800, Wan Ahmad Zainie wrote:
> Add support for eMMC PHY on Intel Keem Bay SoC.

...

> +	ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT,
> +				       dllrdy, IS_DLLRDY(dllrdy),
> +				       0, 50 * USEC_PER_MSEC);
> +	if (ret) {
> +		dev_err(&phy->dev, "dllrdy failed, ret=%d\n", ret);
> +		return ret;
> +	}
> +
> +	return ret;
> +}

This has no changes.

Are you sure the version is correct?

-- 
With Best Regards,
Andy Shevchenko