lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <cover.1592407030.git.cristian.ciocaltea@gmail.com>
Date:   Wed, 17 Jun 2020 19:48:00 +0300
From:   Cristian Ciocaltea <cristian.ciocaltea@...il.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Andreas Färber <afaerber@...e.de>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Philipp Zabel <p.zabel@...gutronix.de>
Cc:     linux-actions@...ts.infradead.org,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-clk@...r.kernel.org
Subject: [PATCH 00/11] Add CMU/RMU/DMA support for Actions Semi S500 SoCs

This patch series improves the existing implementation of the Clock
Management Unit for the Actions Semi S500 SoC, by adding support for
some missing clocks, like DMAC and GPIO.

Additionally, it enables the UART nodes in the common owl-s500 DTS to
use the clock provided by the CMU. That means the S500 based SBCs can
now get rid of their (fake) UART fixed clock and, as a matter of fact,
this has been already done here for RoseapplePi, the new board which
is going to be supported (hopefully) via the following patchset:
https://lore.kernel.org/lkml/cover.1592123160.git.cristian.ciocaltea@gmail.com/

Eventually, the patchset adds support for the Actions Semi S500 SoC's
DMA controller and Reset Management Unit. Please note the already
existing Actions Semi Owl SoCs DMA driver seems to be fully compatible
with S500, even though this is not explicitly mentioned in the source
code. For the moment, I have just enabled the DMA controller node in
owl-s500 DTS using the "actions,s900-dma" compatible string.

In the upcoming patch series I will provide a pinctrl driver and enable
access to MMC and I2C.

Thanks,
Cristi

Cristian Ciocaltea (11):
  clk: actions: Fix h_clk for Actions S500 SoC
  arm: dts: owl-s500: Add Clock Management Unit
  arm: dts: owl-s500: Set UART clock refs from CMU
  arm: dts: owl-s500-roseapplepi: Use UART clock from CMU
  dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC
  clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoC
  arm: dts: owl-s500: Add DMA controller
  dt-bindings: reset: Add binding constants for Actions S500 RMU
  clk: actions: Add Actions S500 SoC Reset Management Unit support
  arm: dts: owl-s500: Add Reset Controller support
  MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs

 MAINTAINERS                                   |  1 +
 arch/arm/boot/dts/owl-s500-roseapplepi.dts    |  7 --
 arch/arm/boot/dts/owl-s500.dtsi               | 37 ++++++++
 drivers/clk/actions/owl-s500.c                | 91 ++++++++++++++++++-
 include/dt-bindings/clock/actions,s500-cmu.h  | 77 ++++++++--------
 .../dt-bindings/reset/actions,s500-reset.h    | 67 ++++++++++++++
 6 files changed, 235 insertions(+), 45 deletions(-)
 create mode 100644 include/dt-bindings/reset/actions,s500-reset.h

-- 
2.27.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ