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Message-ID: <202006181505.Ib82oWa4%lkp@intel.com>
Date:   Thu, 18 Jun 2020 15:54:09 +0800
From:   kernel test robot <lkp@...el.com>
To:     Rasmus Villemoes <linux@...musvillemoes.dk>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
        Li Yang <leoyang.li@....com>, Timur Tabi <timur@...nel.org>
Subject: drivers/soc/fsl/qe/qe_tdm.c:63 ucc_of_parse_tdm() warn: inconsistent
 indenting

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   1b5044021070efa3259f3e9548dc35d1eb6aa844
commit: 5a35435ef4e6e4bd2aabd6706b146b298a9cffe5 soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE
date:   6 months ago
config: arm-randconfig-m031-20200618 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>

smatch warnings:
drivers/soc/fsl/qe/qe_tdm.c:63 ucc_of_parse_tdm() warn: inconsistent indenting

vim +63 drivers/soc/fsl/qe/qe_tdm.c

35ef1c20fdb267 Zhao Qiang         2016-06-06   36  
35ef1c20fdb267 Zhao Qiang         2016-06-06   37  int ucc_of_parse_tdm(struct device_node *np, struct ucc_tdm *utdm,
35ef1c20fdb267 Zhao Qiang         2016-06-06   38  		     struct ucc_tdm_info *ut_info)
35ef1c20fdb267 Zhao Qiang         2016-06-06   39  {
35ef1c20fdb267 Zhao Qiang         2016-06-06   40  	const char *sprop;
35ef1c20fdb267 Zhao Qiang         2016-06-06   41  	int ret = 0;
35ef1c20fdb267 Zhao Qiang         2016-06-06   42  	u32 val;
35ef1c20fdb267 Zhao Qiang         2016-06-06   43  
35ef1c20fdb267 Zhao Qiang         2016-06-06   44  	sprop = of_get_property(np, "fsl,rx-sync-clock", NULL);
35ef1c20fdb267 Zhao Qiang         2016-06-06   45  	if (sprop) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   46  		ut_info->uf_info.rx_sync = qe_clock_source(sprop);
35ef1c20fdb267 Zhao Qiang         2016-06-06   47  		if ((ut_info->uf_info.rx_sync < QE_CLK_NONE) ||
35ef1c20fdb267 Zhao Qiang         2016-06-06   48  		    (ut_info->uf_info.rx_sync > QE_RSYNC_PIN)) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   49  			pr_err("QE-TDM: Invalid rx-sync-clock property\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06   50  			return -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   51  		}
35ef1c20fdb267 Zhao Qiang         2016-06-06   52  	} else {
35ef1c20fdb267 Zhao Qiang         2016-06-06   53  		pr_err("QE-TDM: Invalid rx-sync-clock property\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06   54  		return -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   55  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06   56  
35ef1c20fdb267 Zhao Qiang         2016-06-06   57  	sprop = of_get_property(np, "fsl,tx-sync-clock", NULL);
35ef1c20fdb267 Zhao Qiang         2016-06-06   58  	if (sprop) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   59  		ut_info->uf_info.tx_sync = qe_clock_source(sprop);
35ef1c20fdb267 Zhao Qiang         2016-06-06   60  		if ((ut_info->uf_info.tx_sync < QE_CLK_NONE) ||
35ef1c20fdb267 Zhao Qiang         2016-06-06   61  		    (ut_info->uf_info.tx_sync > QE_TSYNC_PIN)) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   62  			pr_err("QE-TDM: Invalid tx-sync-clock property\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06  @63  		return -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   64  		}
35ef1c20fdb267 Zhao Qiang         2016-06-06   65  	} else {
35ef1c20fdb267 Zhao Qiang         2016-06-06   66  		pr_err("QE-TDM: Invalid tx-sync-clock property\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06   67  		return -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   68  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06   69  
35ef1c20fdb267 Zhao Qiang         2016-06-06   70  	ret = of_property_read_u32_index(np, "fsl,tx-timeslot-mask", 0, &val);
35ef1c20fdb267 Zhao Qiang         2016-06-06   71  	if (ret) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   72  		pr_err("QE-TDM: Invalid tx-timeslot-mask property\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06   73  		return -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   74  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06   75  	utdm->tx_ts_mask = val;
35ef1c20fdb267 Zhao Qiang         2016-06-06   76  
35ef1c20fdb267 Zhao Qiang         2016-06-06   77  	ret = of_property_read_u32_index(np, "fsl,rx-timeslot-mask", 0, &val);
35ef1c20fdb267 Zhao Qiang         2016-06-06   78  	if (ret) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   79  		ret = -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   80  		pr_err("QE-TDM: Invalid rx-timeslot-mask property\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06   81  		return ret;
35ef1c20fdb267 Zhao Qiang         2016-06-06   82  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06   83  	utdm->rx_ts_mask = val;
35ef1c20fdb267 Zhao Qiang         2016-06-06   84  
35ef1c20fdb267 Zhao Qiang         2016-06-06   85  	ret = of_property_read_u32_index(np, "fsl,tdm-id", 0, &val);
35ef1c20fdb267 Zhao Qiang         2016-06-06   86  	if (ret) {
35ef1c20fdb267 Zhao Qiang         2016-06-06   87  		ret = -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   88  		pr_err("QE-TDM: No fsl,tdm-id property for this UCC\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06   89  		return ret;
35ef1c20fdb267 Zhao Qiang         2016-06-06   90  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06   91  	utdm->tdm_port = val;
35ef1c20fdb267 Zhao Qiang         2016-06-06   92  	ut_info->uf_info.tdm_num = utdm->tdm_port;
35ef1c20fdb267 Zhao Qiang         2016-06-06   93  
74c269f69cdae8 Julia Lawall       2016-08-05   94  	if (of_property_read_bool(np, "fsl,tdm-internal-loopback"))
35ef1c20fdb267 Zhao Qiang         2016-06-06   95  		utdm->tdm_mode = TDM_INTERNAL_LOOPBACK;
35ef1c20fdb267 Zhao Qiang         2016-06-06   96  	else
35ef1c20fdb267 Zhao Qiang         2016-06-06   97  		utdm->tdm_mode = TDM_NORMAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06   98  
35ef1c20fdb267 Zhao Qiang         2016-06-06   99  	sprop = of_get_property(np, "fsl,tdm-framer-type", NULL);
35ef1c20fdb267 Zhao Qiang         2016-06-06  100  	if (!sprop) {
35ef1c20fdb267 Zhao Qiang         2016-06-06  101  		ret = -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06  102  		pr_err("QE-TDM: No tdm-framer-type property for UCC\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06  103  		return ret;
35ef1c20fdb267 Zhao Qiang         2016-06-06  104  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06  105  	ret = set_tdm_framer(sprop);
35ef1c20fdb267 Zhao Qiang         2016-06-06  106  	if (ret < 0)
35ef1c20fdb267 Zhao Qiang         2016-06-06  107  		return -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06  108  	utdm->tdm_framer_type = ret;
35ef1c20fdb267 Zhao Qiang         2016-06-06  109  
35ef1c20fdb267 Zhao Qiang         2016-06-06  110  	ret = of_property_read_u32_index(np, "fsl,siram-entry-id", 0, &val);
35ef1c20fdb267 Zhao Qiang         2016-06-06  111  	if (ret) {
35ef1c20fdb267 Zhao Qiang         2016-06-06  112  		ret = -EINVAL;
35ef1c20fdb267 Zhao Qiang         2016-06-06  113  		pr_err("QE-TDM: No siram entry id for UCC\n");
35ef1c20fdb267 Zhao Qiang         2016-06-06  114  		return ret;
35ef1c20fdb267 Zhao Qiang         2016-06-06  115  	}
35ef1c20fdb267 Zhao Qiang         2016-06-06  116  	utdm->siram_entry_id = val;
35ef1c20fdb267 Zhao Qiang         2016-06-06  117  
35ef1c20fdb267 Zhao Qiang         2016-06-06  118  	set_si_param(utdm, ut_info);
35ef1c20fdb267 Zhao Qiang         2016-06-06  119  	return ret;
35ef1c20fdb267 Zhao Qiang         2016-06-06  120  }
4ba251626ff1ac Valentin Longchamp 2017-02-17  121  EXPORT_SYMBOL(ucc_of_parse_tdm);
35ef1c20fdb267 Zhao Qiang         2016-06-06  122  

:::::: The code at line 63 was first introduced by commit
:::::: 35ef1c20fdb26779b6c3c4fd74bbdd5028e70005 fsl/qe: Add QE TDM lib

:::::: TO: Zhao Qiang <qiang.zhao@....com>
:::::: CC: David S. Miller <davem@...emloft.net>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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