linux-kernel - Re: [PATCH 20/21] perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switch

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Message-ID: <20200619194115.GJ576888@hirez.programming.kicks-ass.net>
Date:   Fri, 19 Jun 2020 21:41:15 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     kan.liang@...ux.intel.com
Cc:     mingo@...hat.com, acme@...nel.org, tglx@...utronix.de,
        bp@...en8.de, x86@...nel.org, linux-kernel@...r.kernel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...hat.com, namhyung@...nel.org, dave.hansen@...el.com,
        yu-cheng.yu@...el.com, bigeasy@...utronix.de, gorcunov@...il.com,
        hpa@...or.com, alexey.budankov@...ux.intel.com, eranian@...gle.com,
        ak@...ux.intel.com, like.xu@...ux.intel.com,
        yao.jin@...ux.intel.com
Subject: Re: [PATCH 20/21] perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR
 context switch

On Fri, Jun 19, 2020 at 07:04:08AM -0700, kan.liang@...ux.intel.com wrote:
> The XSAVE instruction requires 64-byte alignment for state buffers. A
> 64-byte aligned kmem_cache is created for architecture LBR.

> +		pmu->task_ctx_cache = create_lbr_kmem_cache(size,
> +							    XSAVE_ALIGNMENT);

> +struct x86_perf_task_context_arch_lbr_xsave {
> +	struct x86_perf_task_context_opt	opt;
> +	union {
> +		struct xregs_state		xsave;

Due to x86_perf_task_context_opt, what guarantees you're actually at the
required alignment here?

> +		struct {
> +			struct fxregs_state	i387;
> +			struct xstate_header	header;
> +			struct arch_lbr_state	lbr;
> +		};
> +	};
> +};