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Date: Fri, 19 Jun 2020 13:31:19 +0200 From: Lars Povlsen <lars.povlsen@...rochip.com> To: Mark Brown <broonie@...nel.org>, SoC Team <soc@...nel.org>, Rob Herring <robh+dt@...nel.org> CC: Lars Povlsen <lars.povlsen@...rochip.com>, Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>, <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, Serge Semin <fancer.lancer@...il.com>, Serge Semin <Sergey.Semin@...kalelectronics.ru> Subject: [PATCH v2 4/6] dt-bindings: snps,dw-apb-ssi: Add sparx5, SPI slave snps,rx-sample-delay-ns and microchip,spi-interface2 properties. This has the following changes for the snps,dw-apb-ss DT bindings: - Add "microchip,sparx5-spi" as the compatible for the Sparx5 SoC controller, - Add the property "snps,rx-sample-delay-ns" for SPI slaves - Add the property "microchip,spi-interface2" for SPI slaves Signed-off-by: Lars Povlsen <lars.povlsen@...rochip.com> --- .../bindings/spi/snps,dw-apb-ssi.yaml | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index c62cbe79f00dd..5bca4f0493bdf 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -36,6 +36,11 @@ properties: - mscc,ocelot-spi - mscc,jaguar2-spi - const: snps,dw-apb-ssi + - description: Microchip Sparx5 SoC SPI Controller + items: + - enum: + - microchip,sparx5-spi + - const: snps,dw-apb-ssi - description: Amazon Alpine SPI Controller const: amazon,alpine-dw-apb-ssi - description: Renesas RZ/N1 SPI Controller @@ -107,6 +112,19 @@ patternProperties: spi-tx-bus-width: const: 1 + snps,rx-sample-delay-ns: + description: SPI Rx sample delay offset, unit is nanoseconds. + The delay from the default sample time before the actual + sample of the rxd input signal occurs. The "rx_sample_delay" + is an optional feature of the designware controller, and the + upper limit is also subject to controller configuration. + $ref: /schemas/types.yaml#/definitions/uint32 + + microchip,spi-interface2: + description: indicates the spi device is placed on a special + controller interface of the "microchip,sparx5-spi" controller. + type: boolean + unevaluatedProperties: false required: @@ -129,5 +147,11 @@ examples: num-cs = <2>; cs-gpios = <&gpio0 13 0>, <&gpio0 14 0>; + spi-flash@1 { + compatible = "spi-nand"; + reg = <1>; + microchip,spi-interface2; + snps,rx-sample-delay-ns = <7>; + }; }; ... -- 2.27.0
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