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Message-ID: <20200621072213.GG128451@builder.lan>
Date:   Sun, 21 Jun 2020 00:22:13 -0700
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc:     Andy Gross <agross@...nel.org>, Stephen Boyd <swboyd@...omium.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        mike.leach@...aro.org, Jonathan Marek <jonathan@...ek.ca>
Subject: Re: [PATCH 2/4] arm64: dts: qcom: sc7180: Add iommus property to ETR

On Tue 09 Jun 06:30 PDT 2020, Sai Prakash Ranjan wrote:

> Define iommus property for Coresight ETR component in
> SC7180 SoC with the SID and mask to enable SMMU
> translation for this master.
> 

We don't have &apps_smmu in linux-next, as we've yet to figure out how
to disable the boot splash or support the stream mapping handover.

So I'm not able to apply this.

Regards,
Bjorn

> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index f684a0b87848..9b38867740ca 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1711,6 +1711,7 @@
>  		etr@...8000 {
>  			compatible = "arm,coresight-tmc", "arm,primecell";
>  			reg = <0 0x06048000 0 0x1000>;
> +			iommus = <&apps_smmu 0x04a0 0x20>;
>  
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
> -- 
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
> 

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