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Message-ID: <159281590234.62212.14723968355916401794@swboyd.mtv.corp.google.com>
Date: Mon, 22 Jun 2020 01:51:42 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Konrad Dybcio <konradybcio@...il.com>, skrzynka@...radybcio.pl
Cc: Konrad Dybcio <konradybcio@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 1/1] clk: qcom: gcc-msm8994: Add missing clocks, resets and GDSCs
Quoting Konrad Dybcio (2020-06-20 11:20:09)
> diff --git a/include/dt-bindings/clock/qcom,gcc-msm8994.h b/include/dt-bindings/clock/qcom,gcc-msm8994.h
> index 938969309e00..d32c3fd2500c 100644
> --- a/include/dt-bindings/clock/qcom,gcc-msm8994.h
> +++ b/include/dt-bindings/clock/qcom,gcc-msm8994.h
> @@ -106,25 +106,62 @@
> #define GCC_GP1_CLK 96
> #define GCC_GP2_CLK 97
> #define GCC_GP3_CLK 98
> -#define GCC_PCIE_0_AUX_CLK 99
> -#define GCC_PCIE_0_PIPE_CLK 100
> -#define GCC_PCIE_1_AUX_CLK 101
> -#define GCC_PCIE_1_PIPE_CLK 102
> -#define GCC_PDM2_CLK 103
> -#define GCC_SDCC1_APPS_CLK 104
> -#define GCC_SDCC2_APPS_CLK 105
> -#define GCC_SDCC3_APPS_CLK 106
> -#define GCC_SDCC4_APPS_CLK 107
> -#define GCC_SYS_NOC_UFS_AXI_CLK 108
> -#define GCC_SYS_NOC_USB3_AXI_CLK 109
> -#define GCC_TSIF_REF_CLK 110
> -#define GCC_UFS_AXI_CLK 111
> -#define GCC_UFS_RX_CFG_CLK 112
> -#define GCC_UFS_TX_CFG_CLK 113
> -#define GCC_USB30_MASTER_CLK 114
> -#define GCC_USB30_MOCK_UTMI_CLK 115
> -#define GCC_USB3_PHY_AUX_CLK 116
> -#define GCC_USB_HS_SYSTEM_CLK 117
> -#define GCC_SDCC1_AHB_CLK 118
> +#define GCC_LPASS_Q6_AXI_CLK 99
> +#define GCC_MSS_Q6_BIMC_AXI_CLK 100
> +#define GCC_PCIE_0_AUX_CLK 101
You can't do this. The numbers are an ABI that should not change. Just
keep tacking on new numbers and new defines instead.
> +#define GCC_PCIE_0_CFG_AHB_CLK 102
> +#define GCC_PCIE_0_MSTR_AXI_CLK 103
> +#define GCC_PCIE_0_PIPE_CLK 104
> +#define GCC_PCIE_0_SLV_AXI_CLK 105
> +#define GCC_PCIE_1_AUX_CLK 106
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