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Message-ID: <20200622170908.GH32200@zn.tnic>
Date:   Mon, 22 Jun 2020 19:09:08 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Andy Lutomirski <luto@...nel.org>
Cc:     X86 ML <x86@...nel.org>, jpa@...nelbug.mail.kapsi.fi,
        Dave Hansen <dave.hansen@...el.com>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/2] x86/fpu: Reset MXCSR to default in kernel_fpu_begin()

On Fri, Jun 19, 2020 at 11:01:44AM -0700, Andy Lutomirski wrote:
> On Fri, Jun 19, 2020 at 10:41 AM Borislav Petkov <bp@...en8.de> wrote:
> >
> > From: Petteri Aimonen <jpa@....mail.kapsi.fi>
> >
> > Previously, kernel floating point code would run with the MXCSR control
> > register value last set by userland code by the thread that was active
> > on the CPU core just before kernel call. This could affect calculation
> > results if rounding mode was changed, or a crash if a FPU/SIMD exception
> > was unmasked.
> >
> > Restore MXCSR to the kernel's default value.
> >
> >  [ bp: Carve out from a bigger patch by Petteri, add feature check, add
> >    FNINIT call too (amluto). ]
> 
> Acked-by: Andy Lutomirski <luto@...nel.org>
> 
> but:
> 
> shouldn't kernel_fpu_begin() end with a barrier()?

the "fninit" thing is already asm volatile or do you want the explicit
memory clobber of barrier?

If so, why?

The LDMXCSR and FNINIT have effect only on hardware state...

-- 
Regards/Gruss,
    Boris.

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