linux-kernel - Re: [PATCH V3 3/3] clk: vc5: Enable addition output configurations of the Versaclock

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Date:   Mon, 22 Jun 2020 19:07:24 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Adam Ford <aford173@...il.com>, linux-clk@...r.kernel.org
Cc:     Adam Ford <aford173@...il.com>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 3/3] clk: vc5: Enable addition output configurations of the Versaclock

Quoting Adam Ford (2020-06-03 08:43:29)
> The existing driver is expecting the Versaclock to be pre-programmed,
> and only sets the output frequency.  Unfortunately, not all devices
> are pre-programmed, and the Versaclock chip has more options beyond
> just the frequency.
> 
> This patch enables the following additional features:
> 
>    - Programmable voltage: 1.8V, 2.5V, or 3.3V\u200b
>    - Slew Percentage of normal: 85%, 90%, or 100%
>    - Output Type: LVPECL, CMOS, HCSL, or LVDS
> 
> Signed-off-by: Adam Ford <aford173@...il.com>
> ---

Applied to clk-next