[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20200623224813.297077-9-konradybcio@gmail.com>
Date: Wed, 24 Jun 2020 00:48:07 +0200
From: Konrad Dybcio <konradybcio@...il.com>
To: skrzynka@...radybcio.pl
Cc: Konrad Dybcio <konradybcio@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Kees Cook <keescook@...omium.org>,
Anton Vorontsov <anton@...msg.org>,
Colin Cross <ccross@...roid.com>,
Tony Luck <tony.luck@...el.com>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 08/12] arm64: dts: qcom: msm8994: Add pmu node
Add the CPU PMU to get perf support for hardware events.
Signed-off-by: Konrad Dybcio <konradybcio@...il.com>
---
arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
index 8af01ebe73f7..b3c01ebc5c67 100644
--- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
@@ -154,6 +154,11 @@ memory {
reg = <0 0 0 0>;
};
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4)| IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
--
2.27.0
Powered by blists - more mailing lists