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Message-ID: <20200623231751.GK128451@builder.lan>
Date: Tue, 23 Jun 2020 16:17:51 -0700
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Konrad Dybcio <konradybcio@...il.com>
Cc: skrzynka@...radybcio.pl, Andy Gross <agross@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Kees Cook <keescook@...omium.org>,
Anton Vorontsov <anton@...msg.org>,
Colin Cross <ccross@...roid.com>,
Tony Luck <tony.luck@...el.com>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 05/12] arm64: dts: qcom: msm8994: Add SDHCI1 node
On Tue 23 Jun 15:48 PDT 2020, Konrad Dybcio wrote:
> Enable support for SDHCI on msm8994-based devices.
>
> Signed-off-by: Konrad Dybcio <konradybcio@...il.com>
Fixed up the indentations and applied the patch, thanks.
> ---
> arch/arm64/boot/dts/qcom/msm8994.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> index a4edc3be7024..f989530ffa90 100644
> --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> @@ -334,6 +334,31 @@ frame@...28000 {
> };
> };
>
> + sdhc1: sdhci@...24900 {
> + compatible = "qcom,sdhci-msm-v4";
> + reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
> + reg-names = "hc_mem", "core_mem";
> +
> + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> + <&gcc GCC_SDCC1_AHB_CLK>,
> + <&xo_board>;
> + clock-names = "core", "iface", "xo";
> +
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
> + &sdc1_rclk_on>;
> + pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off
> + &sdc1_rclk_off>;
> +
> + bus-width = <8>;
> + non-removable;
> + status = "disabled";
> + };
> +
> blsp1_uart2: serial@...1e000 {
> compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> reg = <0xf991e000 0x1000>;
> --
> 2.27.0
>
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