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Message-ID: <20200623104433.ok3vepuc55m7bxoi@vireshk-i7>
Date: Tue, 23 Jun 2020 16:14:33 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Sibi Sankar <sibis@...eaurora.org>
Cc: sboyd@...nel.org, georgi.djakov@...aro.org, saravanak@...gle.com,
mka@...omium.org, nm@...com, bjorn.andersson@...aro.org,
agross@...nel.org, rjw@...ysocki.net,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, dianders@...omium.org,
vincent.guittot@...aro.org, amit.kucheria@...aro.org,
lukasz.luba@....com, sudeep.holla@....com, smasetty@...eaurora.org
Subject: Re: [PATCH v6 0/5] DDR/L3 Scaling support on SDM845 and SC7180 SoCs
On 22-06-20, 13:46, Sibi Sankar wrote:
> This patch series aims to extend cpu based scaling support to L3/DDR on
> SDM845 and SC7180 SoCs.
>
> Patches [1-2] - Blacklist SDM845 and SC7180 in cpufreq-dt-platdev
> Patches [3-5] - Update bw levels based on cpu frequency change
>
> V7:
> * Fixup comments for correctness [Matthias]
> * Initialize icc_scaling_enabled to false [Matthias]
> * Make use of the increased per line character limit [Matthias]
Applied. Thanks.
--
viresh
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