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Message-ID: <CAMpxmJVJQ0Kz0xdRr4pmHddWonn8JQ-4pSEZyfr39ApQV73G=A@mail.gmail.com>
Date: Wed, 24 Jun 2020 12:18:47 +0200
From: Bartosz Golaszewski <bgolaszewski@...libre.com>
To: Srinivas Neeli <srinivas.neeli@...inx.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Michal Simek <michal.simek@...inx.com>,
shubhrajyoti.datta@...inx.com, sgoud@...inx.com,
linux-gpio <linux-gpio@...r.kernel.org>,
arm-soc <linux-arm-kernel@...ts.infradead.org>,
LKML <linux-kernel@...r.kernel.org>, git@...inx.com
Subject: Re: [PATCH V4 3/7] devicetree-binding: Add pmc gpio node
śr., 17 cze 2020 o 13:37 Srinivas Neeli <srinivas.neeli@...inx.com> napisał(a):
>
> From: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
>
> Add the pmc gpio node to the device tree.
>
> Versal devices are the industry's first adaptive compute
> acceleration platforms.
> https://www.xilinx.com/support/documentation/data_sheets/ds950-versal-overview.pdf
>
> On the Versal platform, we are using two customized GPIO controllers(IP)
> which were used in Zynq/ZynqMp platform.
> One of them present in the Platform Management Controller(PMC) block and
> other in Processing System(PS) block.
>
> In PMC_GPIO only Bank0,1,3 & 4 are enabled and in PS_GPIO only
> Bank 0 & 3 are enabled.
>
> You can find more details of GPIO IP in ZynqMP TRM General Purpose
> I/O(Chapter-27).
> https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
>
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
I fixed up the subject - should have been "dt-bindings: gpio: ..."
Bartosz
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