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Date: Wed, 24 Jun 2020 13:07:10 +0100 From: Colin King <colin.king@...onical.com> To: Alex Deucher <alexander.deucher@....com>, Christian König <christian.koenig@....com>, David Airlie <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch>, amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org Cc: kernel-janitors@...r.kernel.org, linux-kernel@...r.kernel.org Subject: [PATCH] drm/radeon: fix array out-of-bounds read and write issues From: Colin Ian King <colin.king@...onical.com> There is an off-by-one bounds check on the index into arrays table->mc_reg_address and table->mc_reg_table_entry[k].mc_data[j] that can lead to reads and writes outside of arrays. Fix the bound checking off-by-one error. Addresses-Coverity: ("Out-of-bounds read/write") Fixes: cc8dbbb4f62a ("drm/radeon: add dpm support for CI dGPUs (v2)") Signed-off-by: Colin Ian King <colin.king@...onical.com> --- drivers/gpu/drm/radeon/ci_dpm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 134aa2b01f90..86ac032275bb 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -4351,7 +4351,7 @@ static int ci_set_mc_special_registers(struct radeon_device *rdev, table->mc_reg_table_entry[k].mc_data[j] |= 0x100; } j++; - if (j > SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) + if (j >= SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE) return -EINVAL; if (!pi->mem_gddr5) { -- 2.27.0
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