[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <2a08075ab09975cbd1c3cee73d425e8f8fef6598.1593124368.git.cristian.ciocaltea@gmail.com>
Date: Fri, 26 Jun 2020 02:34:18 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
To: Rob Herring <robh+dt@...nel.org>,
Andreas Färber <afaerber@...e.de>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-actions@...ts.infradead.org
Subject: [PATCH 06/10] arm: dts: owl-s500: Add MMC nodes
Add MMC controller nodes for Actions Semi S500 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...il.com>
---
arch/arm/boot/dts/owl-s500.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 3b625358d786..778775ac42f7 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -241,5 +241,38 @@ dma: dma-controller@...60000 {
clocks = <&cmu CLK_DMAC>;
power-domains = <&sps S500_PD_DMA>;
};
+
+ mmc0: mmc@...30000 {
+ compatible = "actions,owl-mmc";
+ reg = <0xb0230000 0x38>;
+ interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD0>;
+ resets = <&cmu RESET_SD0>;
+ dmas = <&dma 2>;
+ dma-names = "mmc";
+ status = "disabled";
+ };
+
+ mmc1: mmc@...34000 {
+ compatible = "actions,owl-mmc";
+ reg = <0xb0234000 0x38>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD1>;
+ resets = <&cmu RESET_SD1>;
+ dmas = <&dma 3>;
+ dma-names = "mmc";
+ status = "disabled";
+ };
+
+ mmc2: mmc@...38000 {
+ compatible = "actions,owl-mmc";
+ reg = <0xb0238000 0x38>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_SD2>;
+ resets = <&cmu RESET_SD2>;
+ dmas = <&dma 4>;
+ dma-names = "mmc";
+ status = "disabled";
+ };
};
};
--
2.27.0
Powered by blists - more mailing lists