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Message-ID: <20200626114328.71ae6193@canb.auug.org.au>
Date:   Fri, 26 Jun 2020 11:43:28 +1000
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Daniel Vetter <daniel.vetter@...ll.ch>,
        Intel Graphics <intel-gfx@...ts.freedesktop.org>,
        DRI <dri-devel@...ts.freedesktop.org>
Cc:     Linux Next Mailing List <linux-next@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Nirmoy Das <nirmoy.aiemd@...il.com>,
        Christian König <christian.koenig@....com>
Subject: linux-next: manual merge of the drm-misc tree with Linus' tree

Hi all,

Today's linux-next merge of the drm-misc tree got a conflict in:

  drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c

between commit:

  eaad0c3aa978 ("drm/amdgpu: rename direct to immediate for VM updates")

from the Linus' and commit:

  b1a8ef952a25 ("drm/amdgpu: move ttm bo->offset to amdgpu_bo")

from the drm-misc tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
index 28bdfb3ac33d,2a7a6f62d627..000000000000
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
@@@ -144,8 -141,8 +144,8 @@@ static void amdgpu_vm_sdma_copy_ptes(st
  
  	src += p->num_dw_left * 4;
  
- 	pe += amdgpu_gmc_sign_extend(bo->tbo.offset);
+ 	pe += amdgpu_bo_gpu_offset_no_check(bo);
 -	trace_amdgpu_vm_copy_ptes(pe, src, count, p->direct);
 +	trace_amdgpu_vm_copy_ptes(pe, src, count, p->immediate);
  
  	amdgpu_vm_copy_pte(p->adev, ib, pe, src, count);
  }
@@@ -171,8 -168,8 +171,8 @@@ static void amdgpu_vm_sdma_set_ptes(str
  {
  	struct amdgpu_ib *ib = p->job->ibs;
  
- 	pe += amdgpu_gmc_sign_extend(bo->tbo.offset);
+ 	pe += amdgpu_bo_gpu_offset_no_check(bo);
 -	trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->direct);
 +	trace_amdgpu_vm_set_ptes(pe, addr, count, incr, flags, p->immediate);
  	if (count < 3) {
  		amdgpu_vm_write_pte(p->adev, ib, pe, addr | flags,
  				    count, incr);

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